
Samsung ASIC
5-67
STDL130
DPSRAMBW_HDL
High-Density Dual-Port Synchronous Static RAM with Bit-Write
Reference Table
* For Ymux=16
(Typical process, 1.8V, 25
°
C, Output load = 10SL, Input slope = 0.2 ns, SA=0.5)
NOTES:
1.
2.
In power consumption of DPSRAMBW_HDL, only one port is measured and the other port is isolated.
Standby power is measured on the condition that other signals are in normal operation while CSN is in
disable mode and OEN is low.
Parameters
words
bpw
Timing
(ns)
t
cyc
t
ckl
t
ckh
t
cc
t
as
t
ah
t
cs
t
ch
t
ds
t
dh
t
ws
t
wh
t
bws
t
bwh
t
acc
t
da
t
dz
t
zd
t
od
Power
(
μ
W/MHz)
Power_read
Power_write
Power_standby
Area
(
μ
m)
Width
Height
256
4
512
8
1024
12
2048
16
3072
20
4096
24
6144
28
8192
32
2.66
0.99
0.42
0.93
0.51
0.01
0.56
0.01
0.81
0.01
0.44
0.01
0.78
0.01
2.38
2.25
0.48
0.59
0.72
2.74
0.95
0.42
1.00
0.51
0.01
0.56
0.01
0.77
0.01
0.45
0.01
0.74
0.01
2.46
2.32
0.52
0.62
0.75
2.85
0.92
0.42
1.10
0.51
0.01
0.56
0.01
0.74
0.01
0.46
0.01
0.70
0.01
2.57
2.41
0.55
0.64
0.79
3.03
0.89
0.42
1.28
0.52
0.01
0.56
0.01
0.70
0.01
0.46
0.01
0.67
0.01
2.75
2.59
0.59
0.66
0.82
3.17
0.88
0.42
1.40
0.51
0.01
0.56
0.01
0.70
0.01
0.46
0.01
0.66
0.01
2.89
2.70
0.59
0.67
0.83
3.34
0.85
0.42
1.58
0.50
0.01
0.56
0.01
0.67
0.01
0.47
0.01
0.63
0.01
3.06
2.84
0.62
0.71
0.86
3.64
0.82
0.42
1.90
0.48
0.01
0.56
0.01
0.64
0.01
0.47
0.01
0.60
0.01
3.36
3.11
0.65
0.74
0.89
3.69
0.79
0.42
1.99
0.45
0.01
0.56
0.01
0.61
0.01
0.48
0.01
0.57
0.01
3.41
3.14
0.68
0.78
0.92
77.53
72.81
24.62
126.78
118.83
35.53
179.48
169.23
47.74
239.90
229.53
62.54
310.98
301.65
79.91
376.81
370.06
94.75
462.42
464.05
114.57
529.95
544.39
134.39
548.20
194.12
893.80
217.72
1239.40
264.92
1585.00
359.32
2008.60
453.60
2354.20
547.86
2699.80
736.38
3045.40
925.16