![](http://datasheet.mmic.net.cn/370000/STDL130_datasheet_16733657/STDL130_596.png)
Samsung ASIC
4-179
STDL130
PvOTyz_ABB_LP
Analog Tri-state Output Buffers with Separate Bulk-Bias
Switching Characteristics
(Typical process, 25
°
C, 2.5V, t
R
/t
F
= 0.20ns, CL: Capacitive Load[pF])
PMOT1_ABB_LP
PMOT2_ABB_LP
Path
Parameter
Delay [ns]
CL = 50.0pF
25.865
22.620
12.996
12.272
25.865
22.620
13.099
12.391
0.757
0.720
25.865
22.620
13.168
12.460
0.787
0.749
<
Delay Equations [ns]
Group1*
1.230 + 0.493*CL
1.062 + 0.431*CL
1.125 + 0.237*CL
1.135 + 0.223*CL
1.228 + 0.493*CL
1.062 + 0.431*CL
1.225 + 0.237*CL
1.252 + 0.223*CL
0.757 + 0.000*CL
0.720 + 0.000*CL
1.228 + 0.493*CL
1.062 + 0.431*CL
1.295 + 0.237*CL
1.321 + 0.223*CL
0.787 + 0.000*CL
0.749 + 0.000*CL
Group2*
1.223 + 0.493*CL
1.054 + 0.431*CL
1.124 + 0.237*CL
1.134 + 0.223*CL
1.223 + 0.493*CL
1.054 + 0.431*CL
1.227 + 0.237*CL
1.253 + 0.223*CL
0.757 + 0.000*CL
0.720 + 0.000*CL
1.223 + 0.493*CL
1.054 + 0.431*CL
1.296 + 0.237*CL
1.322 + 0.223*CL
0.787 + 0.000*CL
0.749 + 0.000*CL
Group3*
1.223 + 0.493*CL
1.051 + 0.431*CL
1.124 + 0.237*CL
1.134 + 0.223*CL
1.223 + 0.493*CL
1.051 + 0.431*CL
1.227 + 0.237*CL
1.253 + 0.223*CL
0.757 + 0.000*CL
0.720 + 0.000*CL
1.223 + 0.493*CL
1.051 + 0.431*CL
1.296 + 0.237*CL
1.322 + 0.223*CL
0.787 + 0.000*CL
0.749 + 0.000*CL
A to PAD
tR
tF
tPLH
tPHL
tR
tF
tPLH
tPHL
tPLZ
tPHZ
tR
tF
tPLH
tPHL
tPLZ
tPHZ
TN to PAD
EN to PAD
*Group1 : CL < 50, *Group2 : 50 =
Path
Parameter
Delay [ns]
CL = 50.0pF
12.964
12.899
6.887
7.421
12.964
12.899
6.989
7.538
0.655
0.872
12.964
12.899
7.059
7.607
0.685
0.901
<
Delay Equations [ns]
Group1*
0.652 + 0.246*CL
0.622 + 0.246*CL
0.950 + 0.119*CL
0.823 + 0.132*CL
0.652 + 0.246*CL
0.622 + 0.246*CL
1.050 + 0.119*CL
0.937 + 0.132*CL
0.655 + 0.000*CL
0.872 + 0.000*CL
0.652 + 0.246*CL
0.622 + 0.246*CL
1.120 + 0.119*CL
1.006 + 0.132*CL
0.685 + 0.000*CL
0.901 + 0.000*CL
Group2*
0.648 + 0.246*CL
0.615 + 0.246*CL
0.951 + 0.119*CL
0.822 + 0.132*CL
0.648 + 0.246*CL
0.615 + 0.246*CL
1.053 + 0.119*CL
0.939 + 0.132*CL
0.655 + 0.000*CL
0.872 + 0.000*CL
0.648 + 0.246*CL
0.615 + 0.246*CL
1.122 + 0.119*CL
1.008 + 0.132*CL
0.685 + 0.000*CL
0.901 + 0.000*CL
Group3*
0.642 + 0.246*CL
0.612 + 0.246*CL
0.952 + 0.119*CL
0.824 + 0.132*CL
0.642 + 0.246*CL
0.612 + 0.246*CL
1.054 + 0.119*CL
0.938 + 0.132*CL
0.655 + 0.000*CL
0.872 + 0.000*CL
0.642 + 0.246*CL
0.612 + 0.246*CL
1.123 + 0.119*CL
1.007 + 0.132*CL
0.685 + 0.000*CL
0.901 + 0.000*CL
A to PAD
tR
tF
tPLH
tPHL
tR
tF
tPLH
tPHL
tPLZ
tPHZ
tR
tF
tPLH
tPHL
tPLZ
tPHZ
TN to PAD
EN to PAD
*Group1 : CL < 50, *Group2 : 50 =