參數(shù)資料
型號(hào)： ST62E30BF1
英文描述： MICROCONTROLLER|8-BIT|ST6200 CPU|CMOS|DIP|28PIN|CERAMIC
中文描述： 單片機(jī)| 8位| ST6200的CPU |的CMOS |雙酯| 28腳|陶瓷
文件頁(yè)數(shù)： 21/86頁(yè)
文件大?。?/td> 531K
代理商： ST62E30BF1
21/86
ST62T30B ST62E30B
CLOCK SYSTEM
(Cont’d)
Figure 11. Clock Circuit Block Diagram
Figure 12. Maximum Operating Frequency (f
MAX
) versus Supply Voltage (V
DD
)
Notes
:
1. In this area, operation is guaranteed at the quartz crystal frequency.
2. Whenthe OSG isdisabled, operation in this area is guaranteed at the crystal frequency. When theOSG
is enabled, operation in this area is guaranteed at a frequency of at least f
OSG Min.
3. When the OSG is disabled, operation in this area is guaranteed at the quartz crystal frequency. When
the OSG is enabled, access to this areais prevented. The internal frequency is kept a f
OSG.
4. When the OSG is disabled, operation in this area is not guaranteed
When the OSG is enabled, access to this area is prevented. The internal frequency is kept at f
OSG.
MAIN
OSCILLATOR
OSG
LFAO
M
U
X
Core
: 13
: 12
: 1
TIMER 1
Watchdog
POR
f
INT
Main Oscillator off
ADC
ARTIMER 16
: 6
M
U
X
1
2.5
3.5
4
4.5
5
5.5
6
8
7
6
5
4
3
2
Maximum FREQUENCY (MHz)
SUPPLY VOLTAGE (V
DD
)
F
3
4
3
2
1
f
OSG
f
OSG
Min
G
I
VR01807
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