參數(shù)資料
型號: SII3512ECTU128
元件分類: 總線控制器
英文描述: PCI BUS CONTROLLER, PQFP128
封裝: LEAD FREE, TQFP-128
文件頁數(shù): 3/132頁
文件大?。?/td> 3011K
代理商: SII3512ECTU128
SiI3512 PCI to Serial ATA Controller
Data Sheet
Silicon Image, Inc.
92
2007-2010 Silicon Image, Inc. All rights reserved.
DS-0102-D01
CONFIDENTIAL
Link/Transport Logic will respond with R_ERR. Note that there is an interlock - if the frame is good, it
will always wait for the Accept_IFIS or Reject_IFIS (if not asserted already) before responding.
Sequence 2:
Link/Transport Logic will continue to receive data while its buffer is being filled up. IntrlckFIS will
cause an interrupt to the host.
Host reads the header; the driver will check the FIS type in RxFIS register and knows that the entire
FIS is not larger than the size of RxFIS0 to 6 register.
Host waits for IFIS_OK (if any error detected – the error signals).
If IFIS_OK is received, host reads all data directly via PCI registers and then issues a Accept_IFIS
(Link/Transport Logic to send R_OK) or a Reject_IFIS (Link/Transport Logic to send R_ERR).
If any error is detected, host can ignore, the Link will respond with R_ERR anyway.
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