參數(shù)資料
型號： SCANPSC110FSC
廠商： FAIRCHILD SEMICONDUCTOR CORP
元件分類： 微控制器/微處理器
英文描述： SCAN Bridge Hierarchical and Multidrop Addressable JTAG Port (IEEE1149.1 System Test Support)
中文描述： SPECIALTY MICROPROCESSOR CIRCUIT, PDSO28
封裝： 0.300 INCH, MS-013, SOIC-28
文件頁數(shù)： 11/25頁
文件大小： 283K
代理商： SCANPSC110FSC
11
www.fairchildsemi.com
S
Level 2 Protocol
(Continued)
along with any other yet undefined Op-Codes, will
cause the device identification register to be inserted
into the active scan chain.
LEVEL 2 INSTRUCTION DESCRIPTIONS
BYPASS:
The
BYPASS
instruction selects the bypass reg-
ister for insertion into the active scan chain when the
SCANPSC110F is selected.
EXTEST:
The
EXTEST
instruction selects the boundary-
scan register for insertion into the active scan chain. The
boundary-scan register consists of seven
“
sample only
”
shift cells connected to the S
(0
–
5)
and OE inputs. On the
SCANPSC110F, the
EXTEST
instruction performs the
same function as the
SAMPLE/PRELOAD
instruction,
since there aren
’
t any scannable outputs on the device.
SAMPLE/PRELOAD:
The
SAMPLE/PRELOAD
instruc-
tion selects the boundary-scan register for insertion into the
active scan chain. The boundary-scan register consists of
seven
“
sample only
”
shift cells connected to the S
(0
–
5)
and
OE inputs.
IDCODE:
The
IDCODE
instruction selects the device iden-
tification register for insertion into the active scan chain.
When
IDCODE
is the current active instruction the device
identification
“
0FC0E01F
”
Hex is captured upon exiting the
Capture-DR
state.
TABLE 5. Level 2 Protocol and Op-Codes
Note 4:
All other instructions act on selected SCANPSC110Fs only.
UNPARK:
This instruction unparks the Local Scan Port
Network and inserts it into the active scan chain as config-
ured by the Mode register (see Table 4). Unparked LSPs
are sequenced synchronously with the SCANPSC110F's
TAP controller.
When a LSP has been parked in the
Test-Logic-Reset
or
Run-Test/Idle
state, it will not become unparked until the
SCANPSC110F's TAP Controller enters the
Run-Test/Idle
state following the
UNPARK
instruction. If an LSP has been
parked in one of the stable pause states (
Pause-DR
or
Pause-IR
), it will not become unparked until the
SCANPSC110F's TAP Controller enters the respective
pause state. (See Figures 9, 10, 11, 12).
PARKTLR:
This instruction causes all unparked LSPs to
be parked in the
Test-Logic-Reset
TAP controller state and
removes the LSP network from the active scan chain. The
LSP controllers keep the LSPs parked in the
Test-Logic-
Reset
state by forcing their respective TMS
L
output with a
constant logic
“
1
”
while the LSP controller is in the
Parked-
TLR
state (see Figure 4).
PARKRTI:
This instruction causes all unparked LSPs to be
parked in the
Run-Test/Idle
state. When a LSP
n
is active
(unparked), its TMS
L
signals follow TMS
B
and the LSP
n
controller state transitions are synchronized with the TAP
Controller state transitions of the SCANPSC110F. When
the instruction register is updated with the
PARKRTI
instruction, TMS
L
will be forced to a constant logic
“
0
”
,
causing the unparked local TAP Controllers to be parked in
the
Run-Test/Idle
state. When an LSP
n
is parked, it is
removed from the active scan chain.
PARKPAUSE:
The
PARKPAUSE
instruction has dual func-
tionality. It can be used to park unparked LSPs or to unpark
parked LSPs. The instruction places all unparked LSPs in
one of the TAP Controller pause states. A local port does
not become parked until the SCANPSC110F's TAP Con-
troller is sequenced through
Exit1-DR/IR
into the
Update-
DR/IR
state. When the SCANPSC110F TAP Controller is in
the
Exit1-DR
or
Exit1-IR
state and TMS
B
is HIGH, the LSP
controller forces a constant logic '0
”
onto TMS
L
thereby
parking the port in the
Pause-DR
or
Pause-IR
state respec-
tively (see
Figure 4
). Another instruction can then be
loaded to reconfigure the local ports or to deselect the
SCANPSC110F (i.e.,
MODESEL, GOTOWAIT,
etc.).
Instructions
Hex Op-Code
FF
00
81
AA
E7
C5
84
C6
C3
8E
03
88
C9
0C
8D
CE
0F
90
TBD
Binary Op-Code
11111111
00000000
10000001
10101010
11100111
11000101
10000100
11000110
11000011
10001110
00000011
10001000
11001001
00001100
10001101
11001110
00001111
10010000
TBD
Data Register
BYPASS
EXTEST
SAMPLE/PRELOAD
IDCODE
UNPARK
PARKTLR
PARKRTI
PARKPAUSE
GOTOWAIT*
MODESEL
MCGRSEL
SOFTRESET
LFSRSEL
LFSRON
LFSROFF
CNTRSEL
CNTRON
CNTROFF
Other Undefined
Bypass Register
Boundary-Scan Register
Boundary-Scan Register
Device Identification Register
Device Identification Register
Device Identification Register
Device Identification Register
Device Identification Register
Device Identification Register
Mode Register
Multi-Cast Group Register
Device Identification Register
Linear Feedback Shift Register
Device Identification Register
Device Identification Register
32-Bit TCK Counter Register
Device Identification Register
Device Identification Register
Device Identification Register
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