參數(shù)資料
型號(hào)： MT90866AG2
廠商： ZARLINK SEMICONDUCTOR INC
元件分類(lèi)： 路由/交換
英文描述： Flexible 4 K x 2.4 K Channel Digital Switch with H.110 Interface and 2.4 K x 2.4 K Local Switch
中文描述： TELECOM, DIGITAL TIME SWITCH, PBGA344
封裝： 27 X 27 MM, LEAD FREE, PLASTIC, MS-034, BGA-344
文件頁(yè)數(shù)： 20/86頁(yè)
文件大?。?/td> 701K
代理商： MT90866AG2
MT90866
Data Sheet
20
Zarlink Semiconductor Inc.
5.0 Local Input Delay Selection
The local input delay selection allows individual local input streams to be aligned and shifted against the input frame
pulse (FRAME_A_io or FRAME_B_io). This feature compensates for the variable path delays in the local interface.
Such delays can occur in large centralized and distributed switching system.
Each local input stream can have its own bit delay offset value by programming the local input bit delay selection
registers (LIDR0 to LIDR9). See Table 12, "Local Input Bit Delay Registers (LIDR0 to LIDR9) Bits" on page 50, for
the contents of these registers. Possible bit adjustment can range up to +7
3/4
bit periods forward with resolution of
1/4
bit period. See Table 13 on page 50 and Figure 19 on page 51 for local input delay programming.
6.0 Output Advancement Selection
The MT90866 allows users to advance individual backplane or local output streams with respect to the frame
boundary. This feature is useful in compensating variable output delays caused by various output loading
conditions. Each output stream can have its own advancement value programmed by the output advancement
registers. The backplane output advancement registers (BOAR0 to BOAR3) are used to program the backplane
output advancement. The local output advancement registers (LOAR0 to LOAR3) are used to program the local
output advancement. Possible adjustment for local and backplane output data streams is 22.5 ns with a resolution
of 7.5 ns. The advancement is independent of the output data rate. Table 14 on page 52 and Figure 20, "Example
of Backplane Output Advancement Timing" on page 52, and Table 15 on page 53 and Figure 21, "Local Output
Advancement Timing" on page 53 describe the details of the output advancement programming for the backplane
and local interfaces respectively.
DMS Register Bits
Modes
Usable Streams
LG32
LG31
LG30
0
0
0
8.192 Mb/s
STi12-15, STo12-15
0
0
1
4.096 Mb/s
0
1
0
2.048 Mb/s
0
1
1
4-bit subrate
1
0
0
2-bit subrate
Table 5 - Mode Selection for Local STi12 - 15 and ST012 - 15 Streams, Group 3
DMS Register Bits
Modes
Usable Streams
LG41
LG40
0
0
8.192 Mb/s
STi16 - 18, STo16 - 18
0
1
4.096 Mb/s
1
0
2.048 Mb/s
STi16 - 27, STo16 - 27
Table 6 - Mode Selection for Local STi16 - 27 and STo16 - 27 Streams, Group 4
相關(guān)PDF資料
PDF描述
MT90869 Flexible 16K Digital Switch (F16kDX)
MT90869AG Flexible 16K Digital Switch (F16kDX)
MT90870 Flexible 12 k Digital Switch (F12kDX)
MT90871AV Flexible 8K Digital Switch (F8KDX)
MT90871 Flexible 8K Digital Switch (F8KDX)
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
MT90866AL 制造商:MITEL 制造商全稱(chēng):Mitel Networks Corporation 功能描述:WAN Access Switch
MT90868AG 制造商:Microsemi Corporation 功能描述:SWIT FABRIC 32KX8K/8KX8K/1K X 1K 1.8V/3.3V 466BGA - Trays
MT90868AG2 制造商:Microsemi Corporation 功能描述:SWIT FABRIC 32KX8K/8KX8K/1K X 1K 1.8V/3.3V 466BGA - Trays
MT90869 制造商:ZARLINK 制造商全稱(chēng):Zarlink Semiconductor Inc 功能描述:Flexible 16K Digital Switch (F16kDX)
MT90869AG 制造商:Microsemi Corporation 功能描述:SWIT FABRIC 16KX16K/8KX8K 1.8V/3.3V 272BGA - Trays 制造商:MICROSEMI CONSUMER MEDICAL PRODUCT GROUP 功能描述:IC DGTL SWITCH F16KDX 272PBGA 制造商:Microsemi Corporation 功能描述:IC DGTL SWITCH F16KDX 272PBGA
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。

采購(gòu)需求

(若只采購(gòu)一條型號(hào)，填寫(xiě)一行即可)

發(fā)布成功！您可以繼續(xù)發(fā)布采購(gòu)。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

發(fā)布成功！您可以繼續(xù)發(fā)布采購(gòu)。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

*型號(hào) *數(shù)量 廠商 批號(hào) 封裝
添加更多采購(gòu)

我的聯(lián)系方式

*
*
*