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參數(shù)資料
| 型號(hào)： | MT90221AL |
| 廠商： | Mitel Networks Corporation |
| 英文描述： | Quad IMA/UNI PHY Device |
| 中文描述： | 四IMA的/單向物理層設(shè)備 |
| 文件頁(yè)數(shù)： | 84/114頁(yè) |
| 文件大?。?/td> | 304K |
| 代理商： | MT90221AL |
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MT90221
76
7.12
Miscellaneous Registers Description
Tables 103 to 105 describe the
General Status
and
Test Register
.
Address (Hex):
Direct access
Reset Value (Hex):
206
10
Bit #
Type
Description
7:4
3
R
Device Revision Number: reads 0001.
Set when the UTOPIA output clock is missing or too slow. This latched bit is cleared by
writing a 0.
Set when the UTOPIA input clock is missing or too slow. This latched bit is cleared by
writing a 0.
Overflow of 1 or more of the TX UTOPIA FIFO.
Set when there is no free cell in TX Cell RAM. This latched bit is cleared by writing a 0.
R/W
2
R/W
1
0
R/W
R/W
Table 103 - General Status Register
Address:
Direct access
Reset Value (Hex):
04E
00
Bit #
Type
Description
7:0
R/W
Write 0x60 for normal operation.
Table 104 - Test 1 Register
Address (Hex):
Direct access
Reset Value (Hex):
0DA
00
Bit #
Type
Description
7:0
7
6
5:4
3
R
W
W
W
W
Reserved (different from written values).
Write 0 for normal operation.
Write 1 for normal operation.
Write 00 for normal operation
Write 1 before adding a link to an existing IMA group.
Write 0 when the link is reported in IMA mode.
Write 0 for normal operation.
Write IMA group number before adding a link to an IMA group.
2
W
W
1:0
Table 105 - Test 2 Register
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MT90222 | 制造商:ZARLINK 制造商全稱:Zarlink Semiconductor Inc 功能描述:4/8/16 Port IMA/TC PHY Device |
| MT90222AG | 制造商:Microsemi Corporation 功能描述:ATM IMA 40MBPS 2.5V 384BGA - Trays |
| MT90222AG2 | 制造商:Microsemi Corporation 功能描述:ATM IMA 40MBPS 2.5V 384BGA /BAKE/DRYPACK - Trays |
| MT90223AG | 制造商:Microsemi Corporation 功能描述:ATM IMA 80MBPS 2.5V 384BGA - Trays |
| MT90223AG2 | 制造商:Microsemi Corporation 功能描述:ATM IMA 80MBPS 2.5V 384BGA - Trays |
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