參數(shù)資料
型號(hào): MT90221AL
廠商: Mitel Networks Corporation
英文描述: Quad IMA/UNI PHY Device
中文描述: 四IMA的/單向物理層設(shè)備
文件頁數(shù): 77/114頁
文件大?。?/td> 304K
代理商: MT90221AL
MT90221
69
Address (Hex):
Direct access
Reset Value (Hex):
09A
1 reg. for all 4 RX links
00
Bit #
Type
Description
7:4
3
2
1
0
R/W
R/W
R/W
R/W
R/W
Reserved. Write 0 for normal operation.
PCM RX Sync signal faulty on link 3. Cleared by writing ’0’.
PCM RX Sync signal faulty on link 2. Cleared by writing ’0’.
PCM RX Sync signal faulty on link 1. Cleared by writing ’0’.
PCM RX Sync signal faulty on link 0. Cleared by writing ’0’.
Table 85 - RX Sync. Status Register
Address (Hex):
Direct access
Reset Value (Hex):
09E
1 reg. for all 4 RX links
00
Bit #
Type
Description
7:4
3
2
1
0
R/W
R/W
R/W
R/W
R/W
Reserved. Write 0 for normal operation.
PCM TX Sync signal faulty on link 3. Cleared by writing ’0’.
PCM TX Sync signal faulty on link 2. Cleared by writing ’0’.
PCM TX Sync signal faulty on link 1. Cleared by writing ’0’.
PCM TX Sync signal faulty on link 0. Cleared by writing ’0’.
Table 86 - TX Sync. Status Register
Address (Hex):
Direct access
Reset Value (Hex):
09C
FF
Bit #
Type
Description
7:4
3
2
1
0
R
R
R
R
R
Reserved.
A ’1’ signifies that the TX Clock, link 3 is disabled.
A ’1’ signifies that the TX Clock, link 2 is disabled.
A ’1’ signifies that the TX Clock, link 1 is disabled.
A ’1’ signifies that the TX Clock, link 0 is disabled.
Table 87 - TX Clock Disabled Status
Address (Hex):
Direct access
Reset Value (Hex):
09D
03
Bit #
Type
Description
7:2
1
0
R
R
R
Unused. Read 0’ss
A ’1’ signifies that the PLLREF1 Clock is disabled.
A ’1’ signifies that the PLLREF0 Clock is disabled.
Table 88 - PLL REF Clock Disabled Status/Device Rev
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