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參數(shù)資料
| 型號： | MT48V16M16LFFG |
| 廠商： | Micron Technology, Inc. |
| 英文描述： | MOBILE SDRAM |
| 中文描述： | 移動SDRAM |
| 文件頁數(shù)： | 24/58頁 |
| 文件大小： | 1451K |
| 代理商： | MT48V16M16LFFG |
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24
256Mb: x16 Mobile SDRAM
MobileRamY26L_A.p65 – Pub. 5/02
Micron Technology, Inc., reserves the right to change products or specifications without notice.
2002, Micron Technology, Inc.
256Mb: x16
MOBILE SDRAM
ADVANCE
DON’T CARE
D
IN
COMMAND
ADDRESS
WRITE
BANK,
COL
n
D
IN
n
NOP
NOP
CLK
T2
T1
T4
T3
T5
T0
CKE
INTERNAL
CLOCK
NOP
D
IN
n
+ 1
D
IN
n
+ 2
NOTE:
For this example, burst length = 4 or greater, and DM
is LOW.
Figure 22
Clock Suspend During WRITE Burst
CLOCK SUSPEND
The clock suspend mode occurs when a column ac-
cess/burst is in progress and CKE is registered LOW. In
the clock suspend mode, the internal clock is deacti-
vated, “freezing” the synchronous logic.
For each positive clock edge on which CKE is
sampled LOW, the next internal positive clock edge is
suspended. Any command or data present on the in-
put pins at the time of a suspended internal clock edge
is ignored; any data present on the DQ pins remains
driven; and burst counters are not incremented, as
long as the clock is suspended. (See examples in Fig-
ures 22 and 23.)
Clock suspend mode is exited by registering CKE
HIGH; the internal clock and related operation will re-
sume on the subsequent positive clock edge.
DEEP POWER-DOWN
Deep Power Down mode is a maximum power sav-
ings feature achieved by shutting off the power to the
entire memory array of the device. Data will not be
retained once Deep Power Down mode is executed.
Deep Power Down mode is entered by having all banks
idle then /CS and /WE held low with /RAS and /CAS
high at the rising edge of the clock, while CKE is low.CKE
must be held low during Deep Power Down.
In order to exit Deep Power Down mode, CKE must
be asserted high. After exiting, the following sequence
is needed in order to enter a new command. Maintain
NOP input conditions for a minimum of 200us. Issue
PRECHARGE commands for all banks. Issue eight or
more AUTOREFRESH commands. Issue a MODE REG-
ISTER set command to initialize mode register. Issue a
EXTENDED MODE REGISTER set command to initial-
ize the extended mode register. See Figure 21A.
Figure 21A
Deep Power-Down
DON T CARE
Exit deep power-down mode.
(
)
(
)
(
)
(
)
Enter deep power-down mode.
CLK
CKE
CS#
WE#
CAS#
RAS#
()()
()()
(
)
(
)
(
)
(
)
()()
()()
()()
()()
()()
()()
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