參數(shù)資料
型號(hào)： MSC8103VT1200F
廠商： Freescale Semiconductor
文件頁(yè)數(shù)： 35/104頁(yè)
文件大?。?/td> 0K
描述： IC DSP 16BIT 300MHZ 332-FCPBGA
標(biāo)準(zhǔn)包裝： 90
系列： StarCore
類型： SC140 內(nèi)核
接口： 通信處理器模塊（CPM）
時(shí)鐘速率： 300MHz
非易失內(nèi)存： 外部
芯片上RAM： 512kB
電壓 - 輸入/輸出： 3.30V
電壓 - 核心： 1.60V
工作溫度： -40°C ~ 75°C
安裝類型： 表面貼裝
封裝/外殼： 332-BFBGA，F(xiàn)CPBGA
供應(yīng)商設(shè)備封裝： 332-FCBGA（17x17）
包裝： 托盤
MSC8103 Network Digital Signal Processor, Rev. 12
1-32
Freescale Semiconductor
Signals/Connections
PC5
SMC1: SMTXD
SI2: L1ST3
FCC2: CTS
HDLC serial, HDLC nibble,
and transparent
Output
Input
SMC1: Transmit Data
The SMC interface consists of SMTXD, SMRXD, SMSYN, and a clock. Not
all signals are used for all applications. SMCs are full-duplex ports that
supports three protocols or modes: UART, transparent, or general-circuit
interface (GCI).
Serial Interface 2: Layer 1 Strobe 3
The MSC8103 time-slot assigner supports up to four strobe outputs that
can be asserted on a bit or byte basis. The strobe outputs are useful for
interfacing to other devices that do not support the multiplexed interface or
for enabling/disabling three-state I/O buffers in a multiple-transmitter
architecture. These strobes can also generate output wave forms for such
applications as stepper-motor control.
FCC2: Clear To Send
In the standard modem interface signals supported by FCC2 (RTS, CTS,
and CD). CTS is asynchronous with the data.
PC4
SMC1: SMRXD
SI2: L1ST4
FCC2: CD
HDLC serial, HDLC nibble,
and transparent
Input
Output
Input
SMC1: Receive Data
The SMC interface consists of SMTXD, SMRXD, SMSYN, and a clock. Not
all signals are used for all applications. SMCs are full-duplex ports that
supports three protocols or modes: UART, transparent, or general-circuit
interface (GCI).
Serial Interface 2: Layer 1 Strobe 4
The MSC8103 time-slot assigner supports up to four strobe outputs that
can be asserted on a bit or byte basis. The strobe outputs are useful for
interfacing to other devices that do not support the multiplexed interface or
for enabling/disabling three-state I/O buffers in a multiple-transmitter
architecture. These strobes can also generate output wave forms for such
applications as stepper-motor control.
FCC2: Carrier Detect
In the standard modem interface signals supported by FCC2 (RTS, CTS
and CD). CD is asynchronous with the data.
Table 1-9.
Port C Signals (Continued)
Name
Dedicated
I/O Data
Direction
Description
General-
Purpose I/O
Peripheral Controller:
Dedicated I/O
Protocol
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