- 您現(xiàn)在的位置：買賣IC網 > PDF目錄1956 > MSC8103VT1200F (Freescale Semiconductor)IC DSP 16BIT 300MHZ 332-FCPBGA PDF資料下載
參數資料
| 型號： | MSC8103VT1200F |
| 廠商： | Freescale Semiconductor |
| 文件頁數： | 30/104頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC DSP 16BIT 300MHZ 332-FCPBGA |
| 標準包裝： | 90 |
| 系列： | StarCore |
| 類型： | SC140 內核 |
| 接口： | 通信處理器模塊（CPM） |
| 時鐘速率： | 300MHz |
| 非易失內存： | 外部 |
| 芯片上RAM： | 512kB |
| 電壓 - 輸入/輸出： | 3.30V |
| 電壓 - 核心： | 1.60V |
| 工作溫度： | -40°C ~ 75°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 332-BFBGA，F(xiàn)CPBGA |
| 供應商設備封裝： | 332-FCBGA（17x17） |
| 包裝： | 托盤 |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁當前第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁第55頁第56頁第57頁第58頁第59頁第60頁第61頁第62頁第63頁第64頁第65頁第66頁第67頁第68頁第69頁第70頁第71頁第72頁第73頁第74頁第75頁第76頁第77頁第78頁第79頁第80頁第81頁第82頁第83頁第84頁第85頁第86頁第87頁第88頁第89頁第90頁第91頁第92頁第93頁第94頁第95頁第96頁第97頁第98頁第99頁第100頁第101頁第102頁第103頁第104頁
CPM Ports
MSC8103 Network Digital Signal Processor, Rev. 12
Freescale Semiconductor
1-27
PC26
BRG6O
CLK6
Timer3: TOUT3
TMCLK
Output
Input
Output
Input
Baud-Rate Generator 6 Output
The CPM supports up to 8 BRGs used internally by the bank-of-clocks
selection logic and/or provide an output to one of the 8 BRG pins.
Clock 6
The CPM supports up to 10 clock input pins sent to the bank-of-clocks
selection logic, where they can be routed to the controllers.
Timer 3: Timer Out 3
The timers (Timer[1–4]) can output a signal on a timer output (TOUT[1–4])
when the reference value is reached. This signal can be an active-low
pulse or a toggle of the current output. The output can also connect
internally to the input of another timer, resulting in a 32-bit timer.
Timer Clock
When selected, TMCLK is the designated input to the SIU timers. When
TMCLK is configured as the input to the SIU timers, the BRG1O input is
disabled. See the System Interface Unit (SIU) chapter in the MSC8103
Reference Manual for additional information.
PC25
BRG7O
CLK7
TIN4
DMA: DACK2
Output
Input
Output
Baud-Rate Generator 7 Output
The CPM supports up to 8 BRGs used internally by the bank-of-clocks
selection logic and/or provide an output to one of the 8 BRG pins.
Clock 7
The CPM supports up to 10 clock input pins sent to the bank-of-clocks
selection logic, where they can be routed to the controllers.
Timer Input 4
A timer can have one of the following sources: another timer, system
clock, system clock divided by 16 or a timer input. The CPM supports up to
4 timer inputs. The timer inputs can be captured on the rising, falling or
both edges.
DMA: Data Acknowledge 2
DACK2, DREQ2, DRACK2 and DONE2 belong to the SIU DMA controller.
DONE2 and DRACK2 are signals on the same pin and therefore cannot be
used simultaneously. There are two sets of DMA pins associated with the
PIO ports.
Table 1-9.
Port C Signals (Continued)
Name
Dedicated
I/O Data
Direction
Description
General-
Purpose I/O
Peripheral Controller:
Dedicated I/O
Protocol
相關PDF資料 |
PDF描述 |
|---|---|
| MSC8112TVT2400V | DSP DUAL CORE 431-FCPBGA |
| MSC8113TVT4800V | DSP TRI-CORE 431-FCPBGA |
| MSC8122MP8000 | DSP 16BIT 500MHZ MULTI 431FCPBGA |
| MSC8144VT800A | IC DSP QUAD 800MHZ 783FCBGA |
| MSC8154SVT1000B | IC PROCESSOR QUAD DGTL 783FCPBGA |
相關代理商/技術參數 |
參數描述 |
|---|---|
| MSC81058 | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:RF & MICROWAVE TRANSISTORS GENERAL PURPOSE AMPLIFIER APPLICATIONS |
| MSC81090 | 制造商:ASI 制造商全稱:ASI 功能描述:NPN SILICON RF POWER TRANSISTOR |
| MSC81111 | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:RF & MICROWAVE TRANSISTORS GENERAL PURPOSE AMPLIFIER APPLICATIONS |
| MSC81118 | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:RF & MICROWAVE TRANSISTORS GENERAL PURPOSE AMPLIFIER APPLICATIONS |
| MSC8112 | 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:Dual Core Digital Signal Processor |
發(fā)布緊急采購，3分鐘左右您將得到回復。