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MOTOROLA
Contents
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CONTENTS
Paragraph
Number
Title
Page
Number
5.2.1
5.2.2
5.2.3
5.2.4
5.2.5
5.2.6
5.2.7
5.2.8
5.2.9
5.3
5.3.1
5.3.2
5.4
5.5
5.6
5.7
5.7.1
5.7.2
5.7.3
5.7.4
5.8
5.9
5.9.1
5.9.2
5.9.3
5.9.4
PCI Command Register..................................................................................5-10
PCI Status Register ........................................................................................5-11
Programming Interface...................................................................................5-12
PCI Base Class Code......................................................................................5-13
PCI Cache Line Size ......................................................................................5-13
Latency Timer................................................................................................5-13
PCI Base Address Registers...........................................................................5-13
PCI Interrupt Line..........................................................................................5-14
PCI Arbiter Control Register .........................................................................5-15
Peripheral Logic Power Management Configuration Registers (PMCRs) ........5-15
Power Management Configuration Register 1 (PMCR1)..............................5-15
Power Management Configuration Register 2 (PMCR2)..............................5-17
Output Driver Configuration Registers..............................................................5-18
Embedded Utilities Memory Block Base Address Register ..............................5-21
Processor Interface Configuration Registers......................................................5-22
Error Handling Registers....................................................................................5-26
ECC Single-Bit Error Registers.....................................................................5-26
Error Enabling Registers................................................................................5-27
Error Detection Registers...............................................................................5-29
Error Status Registers.....................................................................................5-31
Address Map B Options Register.......................................................................5-33
Memory Interface Configuration Registers........................................................5-34
Memory Boundary Registers .........................................................................5-35
Memory Bank Enable Register......................................................................5-39
Memory Page Mode Register.........................................................................5-40
Memory Control Configuration Registers .....................................................5-41
Chapter 6
MPC8240 Memory Interface
6.1
6.2
6.3
6.3.1
6.3.2
6.3.2.1
6.3.2.2
6.3.2.3
6.3.3
6.3.4
6.3.5
6.3.6
Memory Interface Signal Summary.....................................................................6-4
Memory Interface Configuration at Reset............................................................6-6
FPM or EDO DRAM Interface Operation...........................................................6-6
Supported FPM or EDO DRAM Organizations ..............................................6-9
FPM or EDO DRAM Address Multiplexing.................................................6-11
Row Bit Multiplexing During (RAS) The Row Phase ..............................6-11
Column Bit Multiplexing During (CAS) the Column Phase.....................6-12
Graphical View of the Row and Column Bit Multiplexing.......................6-13
FPM or EDO Memory Data Interface............................................................6-14
FPM or EDO DRAM Initialization................................................................6-16
FPM or EDO DRAM Interface Timing.........................................................6-17
DMA Burst Wrap...........................................................................................6-22