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參數(shù)資料
| 型號： | MAX1359ACTL+ |
| 廠商： | MAXIM INTEGRATED PRODUCTS INC |
| 元件分類： | 模擬信號調(diào)理 |
| 英文描述： | SPECIALTY ANALOG CIRCUIT, QCC40 |
| 封裝： | 6 X 6 MM, 0.80 MM HEIGHT, MO220, TQFN-40 |
| 文件頁數(shù)： | 38/74頁 |
| 文件大?。?/td> | 1214K |
| 代理商： | MAX1359ACTL+ |
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MAX1358/MAX1359/MAX1360
16-Bit Data-Acquisition Systems with ADC, DACs,
UPIOs, RTC, Voltage Monitors, and Temp Sensor
______________________________________________________________________________________
43
The REF_SDC register contains bits to control the refer-
ence voltage and signal-detect comparator.
REFV<1:0>: Reference buffer voltage gain and enable
bits. Enables the output buffer, sets the gain and the
voltage at the REF pin as shown in Table 10. Power-on
state is off to enable an external reference to drive the
REF pin without contention.
AOFF: ADC and DAC/op-amp power-off bit. This bit pro-
vides a method for turning off several analog functions
with a single write. Setting AOFF = 1 deasserts the
ADCE in the ADC register and DAE/OP3E, DBE/OP2E,
and OP1E bits in the DACA_OP and DACB_OP regis-
ters, powering down these analog blocks. Setting AOFF
= 0 has no effect. The AON bit has priority when both
AON and AOFF bits are asserted.
Most of the analog functions can be disabled with a
single write to the REF_SDC register by using AOFF,
REFV<1:0>, and SDCE.
AON: ADC and DAC/op-amp power-on bit. This bit
provides a method of turning on several analog func-
tions with a single write. Setting AON = 1 asserts the
ADCE bit in the ADC register and DAE/OP3E,
DBE/OP2E, and OP1E bits in the DACA_OP and
DACB_OP registers, powering up these blocks. Setting
AON = 0 has no effect. The AON bit has priority when
both AON and AOFF bits are asserted.
Most of the analog functions can be enabled with a sin-
gle write to the REF_SDC register using AON,
REFV<1:0>, and SDCE.
SDCE: Signal-detect comparator power-enable bit. Set
SDCE = 1 to power up the signal-detect comparator
and set SDCE = 0 to power down the signal-detect
comparator. The ADCE bit in the ADC register must be
set to 1 to use the signal-detect comparator.
TSEL<2:0>: Threshold-select bits. These bits select the
threshold for the signal-detect comparator as shown in
Table 11.
MSB
LSB
REFV1
REFV0
AOFF
AON
SDCE
TSEL2
TSEL1
TSEL0
REF_SDC Register (Power-On State: 0000 0000)
REFERENCE
BUFFER GAIN (V/V)
REF OUTPUT
VOLTAGE (V)
REFV1
REFV0
Disabled
Off (High
Impedance at REF)
00
1.0
1.25
0
1
1.638
2.048
1
0
2.0
2.5
1
Table 10. Setting the Reference Output
Voltage
NOMINAL
THRESHOLD (mV)
TSEL2
TSEL1
TSEL0
00
X
50
100
1
0
1
150
1
0
200
1
Table 11. Setting the Signal-Detect
Comparator Threshold
X = Don’t care.
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