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參數(shù)資料
| 型號： | MAX1359ACTL+ |
| 廠商： | MAXIM INTEGRATED PRODUCTS INC |
| 元件分類： | 模擬信號調(diào)理 |
| 英文描述： | SPECIALTY ANALOG CIRCUIT, QCC40 |
| 封裝： | 6 X 6 MM, 0.80 MM HEIGHT, MO220, TQFN-40 |
| 文件頁數(shù)： | 24/74頁 |
| 文件大?。?/td> | 1214K |
| 代理商： | MAX1359ACTL+ |
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MAX1358/MAX1359/MAX1360
16-Bit Data-Acquisition Systems with ADC, DACs,
UPIOs, RTC, Voltage Monitors, and Temp Sensor
30
______________________________________________________________________________________
Real-Time Clock (RTC)
The integrated RTC provides the current time information
from a 32-bit counter and subsecond counts from an 8-
bit ripple counter. An internally generated reference
clock of 256Hz (derived from the 32.768kHz crystal) dri-
ves the 8-bit subsecond counter. An overflow of the 8-bit
subsecond counter inputs a 1Hz clock to increment the
32-bit second counter. The RTC 32-bit second counter is
translatable to calendar format with firmware. All 40 bits
(32-bit second counter and 8-bit subsecond counter)
must be clocked in or out for valid data. The RTC and
the 32.768kHz crystal oscillator consume less than 1A
when the rest of the IC is powered down.
Time-of-Day Alarm
Program the AL_DAY register with a 20-bit value, which
corresponds to a time 1s to 12 days later than the cur-
rent time with a 1s resolution. The alarm status bit, ALD,
asserts when the 20 bits of the AL_DAY register match-
es the 20 LSBs of the 32-bit second counter. The ADE
bit automatically clears when the time-of-day alarm
trips. The time-of-day alarm causes the device to exit
sleep mode.
Watchdog
Enable the watchdog timer by writing a 1 to the WDE bit
in the CLK_CTRL register. After enabling the watchdog
timer, the device asserts
RESET for 250ms, if the
watchdog address register is not written every 500ms.
Due to the asynchronous nature of the watchdog timer,
the watchdog timeout period varies between 500ms
and 750ms. Write a 0 to the WDE bit to disable the
watchdog timer. See Figure 13 for a block diagram of
the watchdog timer.
32KIN
32KOUT
32.768kHz OSCILLATOR
32kHz
OSCILLATOR
OSCE
32K
Figure 11. 32kHz Crystal-Oscillator Block Diagram
IO32E
CLK32K
CK32E
OSCE
CLK32K I/O CONTROL
2:1
MUX
1
0
IO32E
32K
M32K
Figure 12. CLK32K I/O Block Diagram
D
Q
R
CK
D
Q
R
CK
DIVIDE-
BY-8192
32K
WDE
POR
WDW
WATCHDOG TIMER
POR PULSES HIGH DURING POWER-UP.
WDW PULSES HIGH DURING WATCHDOG REGISTER WRITE.
4Hz
WDTO
Figure 13. Watchdog Timer Block Diagram
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相關(guān)代理商/技術(shù)參數(shù) |
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| MAX1359ACTL+ | 制造商:Maxim Integrated Products 功能描述:DATA ACQ SYS SGL ADC SGL DAC 16BIT 40TQFN EP - Rail/Tube |
| MAX1359ACTL+T | 制造商:Maxim Integrated Products 功能描述:DATA ACQ SYS SGL ADC SGL DAC 16BIT 40TQFN EP - Tape and Reel |
| MAX1359ACTL-T | 制造商:Maxim Integrated Products 功能描述:16-BIT DATA-ACQUISITION SYSTEM W ADC,DACS,UPI - Tape and Reel |
| MAX1359AEGL | 制造商:Maxim Integrated Products 功能描述:- Rail/Tube |
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