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參數(shù)資料
| 型號(hào)： | M7A3PE600-FPQG208I |
| 元件分類： | FPGA |
| 英文描述： | FPGA, 600000 GATES, PQFP208 |
| 封裝： | 0.50 MM PITCH, GREEN, PLASTIC, QFP-208 |
| 文件頁數(shù)： | 74/168頁 |
| 文件大?。?/td> | 1335K |
| 代理商： | M7A3PE600-FPQG208I |
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ProASIC3E Flash Family FPGAs
A d v an c ed v0 . 5
5 -1
Datasheet Information
List of Changes
The following table lists critical changes that were made in the current version of the document.
Previous Version
Changes in Current Version (Advanced v0.5)
Page
Advanced v0.4
BLVDS and M-LVDS are new I/O standards added to the datasheets.
N/A
(October 2005)
The term flow-through was changed to pass-through.
N/A
The "Pro I/Os with Advanced I/O Standards" section was updated to include I/O bank
information.
Figure 2-7 Very-Long-Line Resources was updated.
The footnotes in Figure 2-16 CCC/PLL Macro were updated.
The Delay Increments in the Programmable Delay Blocks specification in Table 2-4 ProASIC3E
CCC/PLL Specification was updated.
The "SRAM and FIFO" section was updated.
The "RESET" section was updated.
The "WCLK and RCLK" section was updated.
The "RESET" section was updated.
The "RESET" section was updated.
The "Introduction" of the "Pro I/Os" section was updated.
Table 2-15 I/O Features ProASIC3E was updated.
The "Double Data Rate (DDR) Support" section was updated to include information concerning
implementation of the feature.
The "Electrostatic Discharge (ESD) Protection" section was updated to include testing
information.
The notes in Table 2-18 I/O Hot-Swap and 5 V Input Tolerance Capabilities were updated.
A footnote was added to Table 2-16 Maximum I/O Frequency for Single-Ended, Voltage-
The "x" was updated in the "User I/O Naming Convention" section.
The "VCC Core Supply Voltage" pin description was updated.
The "VMVx I/O Supply Voltage (quiet)" pin description was updated to include information
concerning leaving the pin unconnected
Advanced v0.3
The "VJTAG JTAG Supply Voltage" pin description was updated.
The "VPUMP Programming Supply Voltage" pin description was updated to include information
on what happens when the pin is tied to ground.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| M7A5 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:MEDIUM CURRENT SILICON RECTIFIERS |
| M7A9 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:MEDIUM CURRENT SILICON RECTIFIERS |
| M7AFS600-1FG256 | 制造商:Microsemi Corporation 功能描述:FPGA FUSION 600K GATES 1282.05MHZ 130NM 1.5V 256FBGA - Trays 制造商:Microsemi SOC Products Group 功能描述:FPGA FUSION 600K GATES 1282.05MHZ 130NM 1.5V 256FBGA - Trays |
| M7AFS600-1FG256ES | 制造商:ACTEL 制造商全稱:Actel Corporation 功能描述:Actel Fusion Mixed-Signal FPGAs |
| M7AFS600-1FG256I | 制造商:Microsemi Corporation 功能描述:FPGA FUSION 600K GATES 1282.05MHZ 130NM 1.5V 256FBGA - Trays 制造商:Microsemi SOC Products Group 功能描述:FPGA FUSION 600K GATES 1282.05MHZ 130NM 1.5V 256FBGA - Trays |
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