參數(shù)資料
型號: M34524MC-XXXFP
元件分類: 微控制器/微處理器
英文描述: 4-BIT, MROM, 6 MHz, MICROCONTROLLER, PQFP64
封裝: 14 X 14 MM, 0.80 MM PITCH, PLASTIC, QFP-64
文件頁數(shù): 158/161頁
文件大小: 1199K
代理商: M34524MC-XXXFP
Skip condition
Number of
cycles
Number of
words
Instruction
code
D9
D0
Flag CY
2
16
Skip condition
Number of
cycles
Number of
words
Instruction
code
D9
D0
Flag CY
2
16
Skip condition
Number of
cycles
Number of
words
Instruction
code
D9
D0
Flag CY
2
16
Skip condition
Number of
cycles
Number of
words
Instruction
code
D9
D0
Flag CY
2
16
Rev.2.00
Jul 27, 2004
page 96 of 159
REJ03B0091-0200Z
4524 Group
DI (Disable Interrupt)
0000000100
004
11
Grouping:
Interrupt control operation
Description: Clears (0) to interrupt enable flag INTE, and
disables the interrupt.
Note:
Interrupt is disabled by executing the DI in-
struction after executing 1 machine cycle.
Operation:
(INTE)
← 0
DWDT (Disable WatchDog Timer)
1010011100
29C
11
Grouping:
Other operation
Description: Stops the watchdog timer function by the
WRST instruction after executing the
DWDT instruction.
Operation:
Stop of watchdog timer function enabled
EPOF (Enable POF instruction)
0001011011
05B
11
Grouping:
Other operation
Description: Makes the immediate after POF or POF2
instruction valid by executing the EPOF in-
struction.
Operation:
POF instruction, POF2 instruction valid
EI (Enable Interrupt)
0000000101
005
11
Grouping:
Interrupt control operation
Description: Sets (1) to interrupt enable flag INTE, and
enables the interrupt.
Note:
Interrupt is enabled by executing the EI in-
struction after executing 1 machine cycle.
Operation:
(INTE)
← 1
MACHINE INSTRUCTIONS (INDEX BY ALPHABET) (continued)
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