參數(shù)資料
型號(hào)： M34524MC-XXXFP
元件分類： 微控制器/微處理器
英文描述： 4-BIT, MROM, 6 MHz, MICROCONTROLLER, PQFP64
封裝： 14 X 14 MM, 0.80 MM PITCH, PLASTIC, QFP-64
文件頁數(shù)： 147/161頁
文件大小： 1199K
代理商： M34524MC-XXXFP
Rev.2.00
Jul 27, 2004
page 86 of 159
REJ03B0091-0200Z
4524 Group
Symbol
A
B
DR
E
V1
V2
I1
I2
I3
MR
PA
W1
W2
W3
W4
W5
W6
J1
Q1
Q2
Q3
L1
L2
PU0
PU1
FR0
FR1
FR2
FR3
K0
K1
K2
X
Y
Z
DP
PC
PCH
PCL
SK
SP
CY
RPS
R1
R2
R3
R4L
R4H
RLC
Contents
Register A (4 bits)
Register B (4 bits)
Register DR (3 bits)
Register E (8 bits)
Interrupt control register V1 (4 bits)
Interrupt control register V2 (4 bits)
Interrupt control register I1 (4 bits)
Interrupt control register I2 (4 bits)
Interrupt control register I3 (1 bit)
Clock control register MR (4 bits)
Timer control register PA (1 bit)
Timer control register W1 (4 bits)
Timer control register W2 (4 bits)
Timer control register W3 (4 bits)
Timer control register W4 (4 bits)
Timer control register W5 (4 bits)
Timer control register W6 (4 bits)
Serial I/O control register J1 (4 bits)
A/D control register Q1 (4 bits)
A/D control register Q2 (4 bits)
A/D control register Q3 (4 bits)
LCD control register L1 (4 bits)
LCD control register L2 (4 bits)
Pull-up control register PU0 (4 bits)
Pull-up control register PU1 (4 bits)
Port output format control register FR0 (4 bits)
Port output format control register FR1 (4 bits)
Port output format control register FR2 (4 bits)
Port output format control register FR3 (4 bits)
Key-on wakeup control register K0 (4 bits)
Key-on wakeup control register K1 (4 bits)
Key-on wakeup control register K2 (4 bits)
Register X (4 bits)
Register Y (4 bits)
Register Z (2 bits)
Data pointer (10 bits)
(It consists of registers X, Y, and Z)
Program counter (14 bits)
High-order 7 bits of program counter
Low-order 7 bits of program counter
Stack register (14 bits 8)
Stack pointer (3 bits)
Carry flag
Prescaler reload register (8 bits)
Timer 1 reload register (8 bits)
Timer 2 reload register (8 bits)
Timer 3 reload register (8 bits)
Timer 4 reload register (8 bits)
Timer LC reload register (4 bits)
Contents
Prescaler
Timer 1
Timer 2
Timer 3
Timer 4
Timer 5
Timer LC
Timer 1 interrupt request flag
Timer 2 interrupt request flag
Timer 3 interrupt request flag
Timer 4 interrupt request flag
Timer 5 interrupt request flag
Watchdog timer flag
Watchdog timer enable flag
Interrupt enable flag
External 0 interrupt request flag
External 1 interrupt request flag
Power down flag
A/D conversion completion flag
Serial I/O transmit/receive completion flag
Port D (10 bits)
Port P0 (4 bits)
Port P1 (4 bits)
Port P2 (4 bits)
Port P3 (4 bits)
Port P4 (4 bits)
Port C (1 bit)
Hexadecimal variable
Hexadecimal constant
Binary notation of hexadecimal variable A
(same for others)
Direction of data movement
Data exchange between a register and memory
Decision of state shown before “?”
Contents of registers and memories
Negate, Flag unchanged after executing instruction
RAM address pointed by the data pointer
Label indicating address a6 a5 a4 a3 a2 a1 a0
in page p5 p4 p3 p2 p1 p0
Hex. C + Hex. number x
Symbol
PS
T1
T2
T3
T4
T5
TLC
T1F
T2F
T3F
T4F
T5F
WDF1
WEF
INTE
EXF0
EXF1
P
ADF
SIOF
D
P0
P1
P2
P3
P4
C
x
y
z
p
n
i
j
A3A2A1A0
←
?
( )
—
M(DP)
a
p, a
C
+
x
INSTRUCTIONS
The 4524 Group has the 136 instructions. Each instruction is de-
scribed as follows;
(1) Index list of instruction function
(2) Machine instructions (index by alphabet)
(3) Machine instructions (index by function)
(4) Instruction code table
Note : Some instructions of the 4524 Group has the skip function to unexecute the next described instruction. The 4524 Group just invalidates the next instruc-
tion when a skip is performed. The contents of program counter is not increased by 2. Accordingly, the number of cycles does not change even if skip
is not performed. However, the cycle count becomes “1” if the TABP p, RT, or RTS instruction is skipped.
SYMBOL
The symbols shown below are used in the following list of instruc-
tion function and the machine instructions.
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