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參數(shù)資料
| 型號： | L80600 |
| 英文描述： | L80600 10/100/1000 Mbits/s Ethernet PHY technical manual 3/01 |
| 中文描述： | L80600 10/100/1000 Mbits /秒以太網(wǎng)PHY技術(shù)手冊3月1日 |
| 文件頁數(shù)： | 180/192頁 |
| 文件大小： | 1344K |
| 代理商： | L80600 |
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9-6
L80600 Frequently Asked Questions
of register 0x1D are written to the RAM location pointed to by
register 0x1E. This is sufficient for single register writes and this mode
was used to make the necessary RAM write in answer 7. However, for
loading the entire 14 Kbytes of RAM, this method is not efficient. Since
each MDC/MDIO read/write accesses a 16 bit register, it is more efficient
to use one MII register write, and let the internal software break this into
two 8 bit RAM writes. To achieve this, we program a 16-bit read/write
mode into register 0x16, instead of the earlier 8-bit mode as described
in answer 7. In this mode, each 16-bit write into register 0x1D is broken
into two internal 8-bit RAM writes. The internal hardware automatically
increments the RAM address pointer register 0x1E after each 8-bit write.
It first uses the lowest 8 bits of register 0x1D to write to the RAM location
pointed by register 0x1E. Then it increments the address pointed to by
0x1E by one, and writes the most significant 8 bits of 0x1D into the next
RAM location. This is all transparent to the user, who only has to set the
16 bit read/write mode as described in step 2 below and then do regular
16 bit MDC/MDIO writes.
1.
Power down the L80600 (set bit 11, register 0x00, to make sure that
during RAM writes, the standard operation of the part doesn’t
interfere with writing to the RAM).
2.
Write to register 0x16 the value 0x0006 (this allows access to
expanded access for 16 bit read/write).
3.
Write to register 0x1E the value 0x8400 (the starting address of
RAM).
4.
Write to register 0x1D the desired value. The higher 8 bits of this
register are written into the location pointed to by register 0x1E
above. Then the location pointed to by register 0x1E is incremented
by one automatically to point to the next location. Next, the 8 least
significant bits of register 0x1D are written to the RAM location
pointed to by register 0x1E.
5.
Write to register 0x1D the next desired value.
6.
Continue repeating step 5 for all data to be written.
7.
Write 0x8400 to register 0x1F. This starts execution of down loaded
code at address 0x8400.
8.
Wait for 1.024 ms. (no MDC/MDIO access for 1.024 ms).
9.
Read register 0x00 (this read is needed to clear an interrupt
problem).
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