參數(shù)資料
型號(hào): L80600
英文描述: L80600 10/100/1000 Mbits/s Ethernet PHY technical manual 3/01
中文描述: L80600 10/100/1000 Mbits /秒以太網(wǎng)PHY技術(shù)手冊(cè)3月1日
文件頁(yè)數(shù): 128/192頁(yè)
文件大?。?/td> 1344K
代理商: L80600
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6-14
Applications
Typical unused input pins can be the JTAG pins (TDI, TRST, TMS and
TCK), which can be all tied together and pulled down using a 2 k
resistor. Some of the other reserved or unused pins include pins 186 and
206 (TEST); pins 165, 166, 169, 170, 174, 175, 176, and 177
(RESERVE_GND); and pin 104 (SI). All of these pins except the TEST
pins can be pulled down using a 2 k
resistor per group of pins. TEST
pins can be pulled up or tied to VCC.
6.7 Hardware Reset
The active-LOW RESETn signal (pin 164) should be held LOW for a
minimum of 140
μ
s to allow hardware reset (during hardware reset, the
strap option pins are relatched, and register and state machines are
reset). For timing details, see
Figure 8.13
. There is no on-chip internal
power-on reset. The L80600 requires an external reset signal applied to
the RESETn pin.
6.8 Temperature Considerations
The L80600 utilizes an enhanced 208-pin PQFP package that eliminates
the need for heatsinks in most applications. The package has a built in
heat slug at the top of the package that provides a very efficient method
of removing heat from the die. The enhanced package has a low Theta
Junction to Case of 2.13 C/W and a Theta Junction to Ambient of
11.7 C/W.
For reliability purposes, the die temperature of the L80600 should be
kept below 120 C. This translates to a package case temperature of
112 C. For more information on how this calculation is done see
Chapter 9, “L80600 Frequently Asked Questions.”
6.9 System Design Implementation Consideration
This section outlines certain characteristics of the L80600 that a designer
should be aware of when designing the part into a system.
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