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參數(shù)資料
| 型號： | L80600 |
| 英文描述： | L80600 10/100/1000 Mbits/s Ethernet PHY technical manual 3/01 |
| 中文描述： | L80600 10/100/1000 Mbits /秒以太網(wǎng)PHY技術(shù)手冊3月1日 |
| 文件頁數(shù)： | 176/192頁 |
| 文件大小： | 1344K |
| 代理商： | L80600 |
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9-2
L80600 Frequently Asked Questions
data is used for transmitting data, depending on whether
the PHY is a Master or a Slave. TX_TCLK represents the
actual clock being used to transmit data.
The TX_TCLK is an output of the PHY and can be enabled
to output t on pin 192 (during Test Mode 2 and 3 it is auto-
matically enabled). This is a requirement from the IEEE
802.3ab specification, Clause 40.6.1.2.5 (this clock is only
available in the next generation L80600).
Q2
: What happens to TX_CLK during 1000 Mbit/s operation Similarly
what happens to RXD[4:7] during 10/100 Mbits/s operation
A2
: As mentioned in A1 above, TX_CLK is not used during 1000 Mbit/s
operation, and the RXD[4:7] lines are not used for 10/100 operation.
These signals are outputs of the L80600. To simplify the MII/GMII
interface, these signals are driven actively to a zero volt level, which
eliminates the need for pull-down resistors that would have been needed
if these pins were left floating when unused.
Q3
: What happens to the TX_CLK and RX_CLK signals during
AutoNegotiation and during idles
A3
: During AutoNegotiation, the L80600 drives a 25 MHz clock on the
TX_CLK and RX_CLK lines. In 10 Mbit/s mode, these lines are driven by
a 2.5 MHz clock during idles. In 100 Mbit/s mode they are driven by a
25 MHz clock during idles. In 1000 Mbit/s mode they are driven by a
125 MHz clock during idles.
Q4
: Why doesn’t the L80600 complete AutoNegotiation if the link partner
is a forced 1000 Mbits/s PHY
A4
: IEEE specifications only define “parallel detection” for 10/100 Mbits/s
operation. Parallel detection is the name given to the AutoNegotiation
process where one of the link partners is AutoNegotiating while the other
is in forced 10 or 100 Mbit/s mode. In this case, its expected that the
AutoNegotiating PHY establishes a Half-Duplex link, at the forced speed
of the link partner.
However, for 1000 Mbit/s operation the parallel detection mechanism is
not defined. Instead, any 1000BASE-T PHY can establish 1000 Mbit/s
operation with a link partner for the following two cases:
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