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參數(shù)資料
| 型號(hào)： | HYB18T1G800C4F-3 |
| 廠商： | QIMONDA AG |
| 元件分類： | DRAM |
| 英文描述： | 128M X 8 DDR DRAM, 0.45 ns, PBGA60 |
| 封裝： | GREEN, PLASTIC, TFBGA-60 |
| 文件頁數(shù)： | 43/58頁 |
| 文件大?。?/td> | 1898K |
| 代理商： | HYB18T1G800C4F-3 |
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HYB18T1G[40/80/16]0C4F
1-Gbit Double-Data-Rate-Two SDRAM
Internet Data Sheet
Rev. 1.01, 2008-11
48
04212008-66HT-ZLFE
The following parameters are specified per their average values however, it is understood that the following relationship
between the average timing and the absolute instantaneous timing holds all the time.
t
ERR.nPER
Cumulative error
across n cycles
t
ERR.2PER is defined as the cumulative error across n consecutive cycles
from
t
CK.AVG:
where, i = 1 to 200 and
n= 3 for
t
ERR.3PER
n = 4 for
t
ERR.4PER
n = 5 for
t
ERR.5PER
6
≤ n ≤ 10 for t
ERR.6-10PER
11
≤ n ≤ 50 for t
ERR.11-50PER
ps
t
CH.AVG
Average high-pulse
width
t
CH.AVG is defined as the average high-pulse width, as calculated across
any consecutive 200 high pulses:
N=200
t
CK.AVG
t
CL.AVG
Average low-pulse
width
t
CL.AVG is defined as the average low-pulse width, as calculated across any
consecutive 200 low pulses:
N=200
t
CK.AVG
t
JIT.DUTY
Duty-cycle jitter
t
JIT.DUTY = Min/Max of {tJIT.CH , tJIT.CL}, where:
t
JIT.CH is the largest deviation of any single tCH from tCH.AVG
t
JIT.CL is the largest deviation of any single tCL from tCL.AVG
t
JIT.CH = {tCHi - tCH.AVG × tCK.AVG} where i=1 to 200
t
JIT.CL = {tCLi - tCL.AVG × tCK.AVG} where i=1 to 200
ps
Symbol
Parameter
Description
Units
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
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