參數(shù)資料
型號(hào)： HYB18T1G800C4F-3
廠商： QIMONDA AG
元件分類： DRAM
英文描述： 128M X 8 DDR DRAM, 0.45 ns, PBGA60
封裝： GREEN, PLASTIC, TFBGA-60
文件頁(yè)數(shù)： 25/58頁(yè)
文件大?。?/td> 1898K
代理商： HYB18T1G800C4F-3
HYB18T1G[40/80/16]0C4F
1-Gbit Double-Data-Rate-Two SDRAM
Internet Data Sheet
Rev. 1.01, 2008-11
31
04212008-66HT-ZLFE
5.4
Output Buffer Characteristics
This chapter describes the Output Buffer Characteristics.
TABLE 26
SSTL_18 Output DC Current Drive
TABLE 27
SSTL_18 Output AC Test Conditions
Symbol
Parameter
SSTL_18
Unit
Notes
I
OH
Output Minimum Source DC Current
–13.4
mA
1)2)
1)
V
DDQ = 1.7 V; VOUT = 1.42 V. (VOUT–VDDQ) / IOH must be less than 21 Ω for values of VOUT between VDDQ and VDDQ – 280 mV.
2) The values of
I
OH(dc) and IOL(dc) are based on the conditions given in
1) and 3). They are used to test drive current capability to ensure V
IH.MIN.
plus a noise margin and
V
IL.MAX minus a noise margin are delivered to an SSTL_18 receiver. The actual current values are derived by
shifting the desired driver operating points along 21 Ohm load line to define a convenient current for measurement.
I
OL
Output Minimum Sink DC Current
13.4
mA
3)
V
DDQ = 1.7 V; VOUT = 280 mV. VOUT / IOL must be less than 21 Ohm for values of VOUT between 0 V and 280 mV.
Symbol
Parameter
SSTL_18
Unit
Note
V
OH
Minimum Required Output Pull-up
V
TT + 0.603
V
1)
1) SSTL_18 test load for
V
OH and VOL is different from the referenced load. The SSTL_18 test load has a 20 Ohm series resistor additionally
to the 25 Ohm termination resistor into
V
TT. The SSTL_18 definition assumes that ± 335 mV must be developed across the effectively 25
Ohm termination resistor (13.4 mA
× 25 Ohm = 335 mV). With an additional series resistor of 20 Ohm this translates into a minimum
requirement of 603 mV swing relative to
V
TT, at the ouput device (13.4 mA × 45 Ohm = 603 mV).
V
OL
Maximum Required Output Pull-down
V
TT – 0.603
V
V
OTR
Output Timing Measurement Reference Level
0.5
× V
DDQ
V
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