參數(shù)資料
型號： FW82815
英文描述： Controller Miscellaneous - Datasheet Reference
中文描述： 控制器雜項-數(shù)據(jù)表參考
文件頁數(shù)： 5/172頁
文件大?。?/td> 795K
代理商： FW82815
82815 GMCH
R
Datasheet
5
3.5.8.
3.5.9.
3.5.10.
3.5.11.
3.5.12.
3.5.13.
3.5.14.
3.5.15.
3.5.16.
3.5.17.
3.5.18.
3.5.19.
3.5.20.
3.5.21.
3.5.22.
Graphics Device Registers (Device 2: VISIBLE IN GFX Mode Only).........................102
3.6.1.
VID2—Vendor Identification Register (Device 2).......................................103
3.6.2.
DID2—Device Identification Register (Device 2).......................................103
3.6.3.
PCICMD2—PCI Command Register (Device 2)........................................104
3.6.4.
PCISTS2—PCI Status Register (Device 2) ...............................................105
3.6.5.
RID2—Revision Identification Register (Device 2) ....................................106
3.6.6.
PI—Programming Interface Register (Device 2) .......................................106
3.6.7.
SUBC2—Sub-Class Code Register (Device 2) .........................................106
3.6.8.
BCC2—Base Class Code Register (Device 2)..........................................107
3.6.9.
CLS—Cache Line Size Register (Device 2) ..............................................107
3.6.10.
MLT2—Master Latency Timer Register (Device 2) ...................................107
3.6.11.
HDR2—Header Type Register (Device 2).................................................108
3.6.12.
BIST—BIST Register (Device 2)................................................................108
3.6.13.
GMADR—Graphics Memory Range Address Register (Device 2)...........109
3.6.14.
MMADR—Memory Mapped Range Address Register (Device 2).............110
3.6.15.
SVID—Subsystem Vendor Identification Register (Device 2)....................110
3.6.16.
SID—Subsystem Identification Register (Device 2)...................................111
3.6.17.
ROMADR—Video BIOS ROM Base Address Register (Device 2)............111
3.6.18.
CAPPOINT—Capabilities Pointer Register (Device 2)..............................111
3.6.19.
INTRLINE—Interrupt Line Register (Device 2)..........................................112
3.6.20.
INTRPIN—Interrupt Pin Register (Device 2)..............................................112
3.6.21.
MINGNT—Minimum Grant Register (Device 2).........................................112
3.6.22.
MAXLAT—Maximum Latency Register (Device 2)....................................112
3.6.23.
PM_CAPID—Power Management Capabilities ID Register (Device 2).....113
3.6.24.
PM_CAP—Power Management Capabilities Register (Device 2).............113
3.6.25.
PM_CS—Power Management Control/Status Register (Device 2)..........114
Display Cache Interface...............................................................................................115
3.7.1.
DRT—DRAM Row Type ............................................................................115
3.7.2.
DRAMCL—DRAM Control Low .................................................................116
3.7.3.
DRAMCH—DRAM Control High................................................................117
Display Cache Detect and Diagnostic Registers..........................................................118
3.8.1.
GRX—GRX Graphics Controller Index Register .......................................118
3.8.2.
MSR
Miscellaneous Output.....................................................................119
3.8.3.
GR06
Miscellaneous Register.................................................................119
3.8.4.
GR10
Address Mapping..........................................................................120
3.8.5.
GR11
Page Selector ...............................................................................120
MLT1—Master Latency Timer Register (Device 1) .....................................89
HDR1—Header Type Register (Device 1)...................................................89
PBUSN—Primary Bus Number Register (Device 1)....................................89
SBUSN—Secondary Bus Number Register (Device 1)...............................90
SUBUSN—Subordinate Bus Number Register (Device 1)..........................90
SMLT—Secondary Master Latency Timer Register (Device 1)...................91
IOBASE—I/O Base Address Register (Device 1)........................................92
IOLIMIT—I/O Limit Address Register (Device 1).........................................93
SSTS—Secondary PCI-PCI Status Register (Device 1)..............................94
MBASE—Memory Base Address Register (Device 1).................................95
MLIMIT—Memory Limit Address Register (Device 1) .................................96
PMBASE—Prefetchable Memory Base Address Register (Device 1).........97
PMLIMIT—Prefetchable Memory Limit Address Register (Device 1)..........98
BCTRL—PCI-PCI Bridge Control Register (Device 1).................................99
ERRCMD1—Error Command Register (Device 1)....................................101
3.6.
3.7.
3.8.
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