參數(shù)資料
型號(hào)： DS3141+
廠商： Maxim Integrated Products
文件頁數(shù)： 20/88頁
文件大小： 0K
描述： IC FRAMER DS3/E3 SNGL 144CSBGA
產(chǎn)品培訓(xùn)模塊： Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
標(biāo)準(zhǔn)包裝： 160
控制器類型： DS3/E3 調(diào)幀器
接口： LIU
電源電壓： 3.135 V ~ 3.465 V
電流 - 電源： 80mA
工作溫度： -40°C ~ 85°C
安裝類型： 表面貼裝
封裝/外殼： 144-BGA，CSPBGA
供應(yīng)商設(shè)備封裝： 144-TECSBGA（13x13）
包裝： 托盤
DS3141/DS3142/DS3143/DS3144 Single/Dual/Triple/Quad DS3/E3 Framers
27 of 88
Register Name:
MC5
Register Description:
Master Configuration Register 5
Register Address:
05h
Bit #
7
6
5
4
3
2
1
0
Name
RNEGI
RPOSI
RCLKI
TNEGH
TPOSH
TNEGI
TPOSI
TCLKI
Default
0
Bit 0: TCLK Invert Enable (TCLKI)
0 = do not invert the TCLK signal (normal mode)
1 = invert the TCLK signal (inverted mode)
Bit 1: TPOS/TNRZ Invert Enable (TPOSI)
0 = do not invert the TPOS/TNRZ signal (normal mode)
1 = invert the TPOS/TNRZ signal (inverted mode)
Bit 2: TNEG Invert Enable (TNEGI)
0 = do not invert the TNEG signal (normal mode)
1 = invert the TNEG signal (inverted mode)
Bit 3: TPOS/TNRZ Force-High Enable (TPOSH). The TPOS/TNRZ pin can be forced low by setting both the
TPOSH and TPOSI control bits.
0 = allow normal transmit data to appear at the TPOS/TNRZ pin (normal mode)
1 = force the TPOS/TNRZ signal high (force high mode, can be inverted)
Bit 4: TNEG Force-High Enable (TNEGH). The TNEG pin can be forced low by setting both the TNEGH and
TNEGI control bits.
0 = allow normal transmit data to appear at the TNEG pin (normal mode)
1 = force the TNEG signal high (force high mode, can be inverted)
Bit 5: RCLK Invert Enable (RCLKI)
0 = do not invert the RCLK signal (normal mode)
1 = invert the RCLK signal (inverted mode)
Bit 6: RPOS/RNRZ Invert Enable (RPOSI)
0 = do not invert the RPOS/RNRZ signal (normal mode)
1 = invert the RPOS/RNRZ signal (inverted mode)
Bit 7: RNEG/RLCV Invert Enable (RNEGI)
0 = do not invert the RNEG/RLCV signal (normal mode)
1 = invert the RNEG/RLCV signal (inverted mode)
Register Name:
ISR1
Register Description:
Interrupt Status Register 1
Register Address:
06h
Bit #
7
6
5
4
3
2
1
0
Name
N/A
INT4
INT3
INT2
INT1
Default
—
This register is a global resource and is mapped into address 06h in every framer in the device. In both interrupt-based and polling-based
device servicing strategies, the host processor should read this register first to determine which framers require servicing.
Bit 0: Interrupt 1 (INT1). This bit is set when framer 1 is driving the
INT pin.
Bit 1: Interrupt 2 (INT2). This bit is set when framer 2 is driving the
INT pin.
Bit 2: Interrupt 3 (INT3). This bit is set when framer 3 is driving the
INT pin.
Bit 3: Interrupt 4 (INT4). This bit is set when framer 4 is driving the
INT pin.
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
DS3141+ 功能描述:網(wǎng)絡(luò)控制器與處理器 IC Single DS3/E3 Framer RoHS:否 制造商:Micrel 產(chǎn)品:Controller Area Network (CAN) 收發(fā)器數(shù)量: 數(shù)據(jù)速率: 電源電流（最大值）:595 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:PBGA-400 封裝:Tray
DS314-1010NR WAF 制造商:ON Semiconductor 功能描述:
DS31412 功能描述:網(wǎng)絡(luò)控制器與處理器 IC 12 Port DS3/E3 Framer RoHS:否 制造商:Micrel 產(chǎn)品:Controller Area Network (CAN) 收發(fā)器數(shù)量: 數(shù)據(jù)速率: 電源電流（最大值）:595 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:PBGA-400 封裝:Tray
DS31412N 功能描述:網(wǎng)絡(luò)控制器與處理器 IC 12 Port DS3/E3 Framer RoHS:否 制造商:Micrel 產(chǎn)品:Controller Area Network (CAN) 收發(fā)器數(shù)量: 數(shù)據(jù)速率: 電源電流（最大值）:595 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:PBGA-400 封裝:Tray
DS31415 制造商:MAXIM 制造商全稱:Maxim Integrated Products 功能描述:3-Input, 4-Output, Single DPLL Timing IC with Sub-ps Output Jitter and 1588 Clock
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