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參數(shù)資料
| 型號： | B900J24PXX12I |
| 元件分類： | 數(shù)字信號處理 |
| 英文描述： | 0-BIT, 80 MHz, OTHER DSP, PQFP44 |
| 文件頁數(shù)： | 35/100頁 |
| 文件大小： | 1547K |
| 代理商： | B900J24PXX12I |
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4
Lucent Technologies Inc.
B900
Advance Data Sheet
Baseband Signal Processor
July 1999
Table of Contents (continued)
Figure
Page
Figure 1. B900 44-Pin PLCC Pin Diagram ............................................................................................................... 8
Figure 2. B900 44-Pin MQFP Pin Diagram .............................................................................................................. 9
Figure 3. B900 Pinout by Group ............................................................................................................................. 10
Figure 4. B900 Block Diagram................................................................................................................................ 16
Figure 5. DSP1600 Core Block Diagram................................................................................................................ 20
Figure 6. Clock Generation Overview..................................................................................................................... 27
Figure 7. SSI Interconnections ............................................................................................................................... 29
Figure 8. B900 SIO Block Diagram ........................................................................................................................ 35
Figure 9. 64-Bit and 80-Bit Serial Transfer in Active, Single-Channel Mode.......................................................... 36
Figure 10. Plot of VOH vs. IOH Under Typical Operating Conditions........................................................................ 73
Figure 11. Plot of VOL vs. IOL Under Typical Operating Conditions ......................................................................... 73
Figure 12. I/O Clock Timing Diagram ..................................................................................................................... 78
Figure 13. Reset Synchronization Timing............................................................................................................... 79
Figure 14. JTAG Timing Diagram........................................................................................................................... 80
Figure 15. Interrupt Timing Diagram....................................................................................................................... 81
Figure 16. Write Outputs Followed by Read Inputs (cbit = Immediate; a1 = sbit) .................................................. 82
Figure 17. SSI Transfer Timing (SPHA = 0) ........................................................................................................... 83
Figure 18. SSI Transfer Timing (SPHA = 1) ........................................................................................................... 84
Figure 19. SIO Active Output Timing Diagram ....................................................................................................... 86
Figure 20. SIO Passive Output Timing Diagram .................................................................................................... 87
Figure 21. SIO Active Input Timing Diagram .......................................................................................................... 88
Figure 22. SIO Passive Input Timing Diagram ....................................................................................................... 89
Figure 23. Serial I/O Active Clocks Timing Diagram .............................................................................................. 90
Figure 24. Fundamental Crystal Configuration....................................................................................................... 91
Figure 25. 5 V Crystal Oscillator Negative Resistance Curves .............................................................................. 92
Figure 26. 3.3 V Crystal Oscillator Negative Resistance Curves ........................................................................... 93
Figure 27. Components of Load Capacitance for Crystal Oscillator....................................................................... 94
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