Bit1 Address Register Bit Description 7 6 5 4 3 2 1 0 Comments Notes V" />
參數(shù)資料
型號： ADV7184BSTZ
廠商： Analog Devices Inc
文件頁數(shù)： 9/112頁
文件大?。?/td> 0K
描述： IC DECODER VID SDTV MULTI 80LQFP
標準包裝： 1
類型： 視頻解碼器
應用： 投影儀，錄音機，安全
電壓 - 電源，模擬： 3.15 V ~ 3.45 V
電壓 - 電源，數(shù)字： 1.65 V ~ 2 V
安裝類型： 表面貼裝
封裝/外殼： 80-LQFP
供應商設備封裝： 80-LQFP（14x14）
包裝： 托盤
ADV7184
Rev. A | Page 106 of 112
Bit1
Address Register
Bit Description
7 6 5 4 3 2 1 0
Comments
Notes
VBI_DATA_P329_N277 [3:0].
0 0 0 0
Sets VBI standard to be decoded
from Line 329 (PAL), 277 (NTSC).
0x6F
VDP_LINE_019
VBI_DATA_P16_N14 [3:0].
0 0 0 0
Sets VBI standard to be decoded
from Line 16 (PAL), 14 (NTSC).
MAN_LINE_PGM must be set to
1 for these bits to be effective.
VBI_DATA_P330_N278 [3:0].
0 0 0 0
Sets VBI standard to be decoded
from Line 330 (PAL), 278 (NTSC).
0x70
VDP_LINE_01A
VBI_DATA_P17_N15 [3:0].
0 0 0 0
Sets VBI standard to be decoded
from Line 17 (PAL), 15 (NTSC).
MAN_LINE_PGM must be set to
1 for these bits to be effective.
VBI_DATA_P331_N279 [3:0].
0 0 0 0
Sets VBI standard to be decoded
from Line 331 (PAL), 279 (NTSC).
0x71
VDP_LINE_01B
VBI_DATA_P18_N16 [3:0].
0 0 0 0
Sets VBI standard to be decoded
from Line 18 (PAL), 16 (NTSC).
MAN_LINE_PGM must be set to
1 for these bits to be effective.
VBI_DATA_P332_N280 [3:0].
0 0 0 0
Sets VBI standard to be decoded
from Line 332 (PAL), 280 (NTSC).
0x72
VDP_LINE_01C
VBI_DATA_P19_N17 [3:0].
0 0 0 0
Sets VBI standard to be decoded
from Line 19 (PAL), 17 (NTSC).
MAN_LINE_PGM must be set to
1 for these bits to be effective.
VBI_DATA_P333_N281 [3:0].
0 0 0 0
Sets VBI standard to be decoded
from Line 333 (PAL), 281 (NTSC).
0x73
VDP_LINE_01D
VBI_DATA_P20_N18 [3:0].
0 0 0 0
Sets VBI standard to be decoded
from Line 20 (PAL), 18 (NTSC).
MAN_LINE_PGM must be set to
1 for these bits to be effective.
VBI_DATA_P334_N282 [3:0].
0 0 0 0
Sets VBI standard to be decoded
from Line 334 (PAL), 282 (NTSC).
0x74
VDP_LINE_01E
VBI_DATA_P21_N19 [3:0].
0 0 0 0
Sets VBI standard to be decoded
from Line 21 (PAL), 19 (NTSC).
MAN_LINE_PGM must be set to
1 for these bits to be effective.
VBI_DATA_P335_N283 [3:0].
0 0 0 0
Sets VBI standard to be decoded
from Line 335 (PAL), 283 (NTSC).
0x75
VDP_LINE_01F
VBI_DATA_P22_N20 [3:0].
0 0 0 0
Sets VBI standard to be decoded
from Line 22 (PAL), 20 (NTSC).
MAN_LINE_PGM must be set to
1 for these bits to be effective.
VBI_DATA_P336_N284 [3:0].
0 0 0 0
Sets VBI standard to be decoded
from Line 336 (PAL), 284 (NTSC).
0x76
VDP_LINE_020
VBI_DATA_P23_N21 [3:0].
0 0 0 0
Sets VBI standard to be decoded
from Line 23 (PAL), 21 (NTSC).
MAN_LINE_PGM must be set to
1 for these bits to be effective.
VBI_DATA_P337_N285 [3:0].
0 0 0 0
Sets VBI standard to be decoded
from Line 337 (PAL), 285 (NTSC).
0x77
VDP_LINE_021
VBI_DATA_P24_N22 [3:0].
0 0 0 0
Sets VBI standard to be decoded
from Line 24 (PAL), 22 (NTSC).
MAN_LINE_PGM must be set to
1 for these bits to be effective.
0
Closed captioning not detected.
CC_AVL.
1
Closed captioning detected.
CC_CLEAR resets the CC_AVL
bit.
0
Closed captioning decoded from
odd field.
CC_EVEN_FIELD.
1
Closed captioning decoded from
even field.
0
CGMS/WSS not detected.
CGMS_WSS_AVL.
1
CGMS/WSS detected.
CGMS_WSS_CLEAR resets the
CGMS_WSS_AVL bit.
Reserved.
0
VPS not detected.
GS_PDC_VPS_UTC_AVL.
1
VPS detected.
GS_PDC_VPS_UTC_CLEAR
resets the
GS_PDC_VPS_UTC_AVL bit.
0
Gemstar 1× detected.
GS_DATA_TYPE.
1
Gemstar 2× detected.
0
VITC not detected.
VITC_AVL.
1
VITC detected.
VITC_CLEAR resets the
VITC_AVL bit.
0
Teletext not detected.
0x78
VDP_STATUS
(Read Only)
TTXT_AVL.
1
Teletext detected.
VDP_STATUS_CLEAR
(Write Only)
0
Does not reinitialize the CC registers.
CC_CLEAR.
1
Reinitializes the CC readback registers.
This is a self-clearing bit.
Reserved.
0
Does not reinitialize the
CGMS/WSS registers.
CGMS_WSS_CLEAR.
1
Reinitializes the CGMS/WSS
readback registers.
This is a self-clearing bit.
Reserved.
0
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