參數(shù)資料
型號(hào)： ADV7184BSTZ
廠(chǎng)商： Analog Devices Inc
文件頁(yè)數(shù)： 4/112頁(yè)
文件大?。?/td> 0K
描述： IC DECODER VID SDTV MULTI 80LQFP
標(biāo)準(zhǔn)包裝： 1
類(lèi)型： 視頻解碼器
應(yīng)用： 投影儀，錄音機(jī)，安全
電壓 - 電源，模擬： 3.15 V ~ 3.45 V
電壓 - 電源，數(shù)字： 1.65 V ~ 2 V
安裝類(lèi)型： 表面貼裝
封裝/外殼： 80-LQFP
供應(yīng)商設(shè)備封裝： 80-LQFP（14x14）
包裝： 托盤(pán)
ADV7184
Rev. A | Page 101 of 112
Table 107 provides a detailed description of the registers located in the user sub map.
Table 107. User Sub Map Detailed Description
Bit1
Address Register
Bit Description
7 6 5 4 3 2 1 0
Comments
Notes
0 0
Open drain.
0 1
Drive low when active.
1 0
Drive high when active.
INTRQ_OP_SEL [1:0]. Interrupt drive
level select.
1 1
Reserved.
0
Manual interrupt mode disabled.
MPU_STIM_INTRQ. Manual interrupt set
mode.
1
Manual interrupt mode enabled.
Reserved.
x
Not used.
0 0
Reserved.
0 1
Pseudosync only.
1 0
Color stripe only.
MV_INTRQ_SEL [1:0]. Macrovision
interrupt select.
1 1
Pseudosync or color stripe.
0 0
3 XTAL periods.
0 1
15 XTAL periods.
1 0
63 XTAL periods.
0x40
Interrupt Configuration 0
INTRQ_DUR_SEL [1:0]. Interrupt duration
select.
1 1
Active until cleared.
0
No change.
SD_LOCK_Q.
1
SD input has caused the decoder
to go from an unlocked state to a
locked state.
0
No change
SD_UNLOCK_Q.
1
SD input has caused the decoder
to go from a locked state to an
unlocked state.
Reserved.
x
Reserved.
x
Reserved.
x
0
No change.
SD_FR_CHNG_Q.
1
Denotes a change in the
free-run status.
0
No change.
MV_PS_CS_Q.
1
Pseudosync/color striping detected.
See Register 0x40 MV_INTRQ_SEL [1:0]
for selection.
0x42
Interrupt Status 1
(Read Only)
Reserved.
x
These bits can be cleared or
masked in Registers 0x43 and
0x44, respectively.
0
Does not clear.
SD_LOCK_CLR.
1
Clears SD_LOCK_Q bit.
0
Does not clear.
SD_UNLOCK_CLR.
1
Clears SD_UNLOCK_Q bit.
Reserved.
0
Not used.
Reserved.
0
Not used.
Reserved.
0
Not used.
0
Do not clear.
SD_FR_CHNG_CLR.
1
Clears SD_FR_CHNG_Q bit.
0
Does not clear.
MV_PS_CS_CLR.
1
Clears MV_PS_CS_Q bit.
0x43
Interrupt Clear 1
(Write Only)
Reserved.
x
Not used.
0
Masks SD_LOCK_Q bit.
SD_LOCK_MSKB.
1
Unmasks SD_LOCK_Q bit.
0
Masks SD_UNLOCK_Q bit.
SD_UNLOCK_MSKB.
1
Unmasks SD_UNLOCK_Q bit.
Reserved.
0
Not used.
Reserved.
0
Not used.
Reserved.
0
Not used.
0
Masks SD_FR_CHNG_Q bit.
SD_FR_CHNG_MSKB.
1
Unmasks SD_FR_CHNG_Q bit.
0
Masks MV_PS_CS_Q bit.
MV_PS_CS_MSKB.
1
Unmasks MV_PS_CS_Q bit.
0x44
Interrupt Mask 1
(Read/Write)
Reserved.
x
Not used.
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