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參數(shù)資料
| 型號(hào)： | ADUC7034BCPZ-RL |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 78/136頁 |
| 文件大小： | 0K |
| 描述： | IC MCU FLASH 32K ANLG IO 48LFCSP |
| 標(biāo)準(zhǔn)包裝： | 2,500 |
| 系列： | MicroConverter® ADuC7xxx |
| 核心處理器： | ARM7 |
| 芯體尺寸： | 16/32-位 |
| 速度： | 20.48MHz |
| 連通性： | LIN，SPI，UART/USART |
| 外圍設(shè)備： | POR，PSM，溫度傳感器，WDT |
| 輸入/輸出數(shù)： | 9 |
| 程序存儲(chǔ)器容量： | 32KB（16K x 16） |
| 程序存儲(chǔ)器類型： | 閃存 |
| RAM 容量： | 1K x 32 |
| 電壓 - 電源 (Vcc/Vdd)： | 3.5 V ~ 18 V |
| 數(shù)據(jù)轉(zhuǎn)換器： | A/D 2x16b |
| 振蕩器型： | 內(nèi)部 |
| 工作溫度： | -40°C ~ 115°C |
| 封裝/外殼： | 48-VFQFN 裸露焊盤，CSP |
| 包裝： | 帶卷 (TR) |
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ADuC7034
Rev. B | Page 46 of 136
ADC Mode Register
Name:
ADCMDE
Address:
0xFFFF0508
Default Value:
0x00
Access:
Read/write
Function:
The ADC mode MMR is an 8-bit register that configures the mode of operation of the ADC subsystem.
Table 35. ADCMDE MMR Bit Designations
Bit
Description
7
Not used. This bit is reserved for future functionality and should be written as 0 by user code.
6
20 kΩ resistor select.
1 = selects the 20 kΩ resistor shown in Figure 20.
0 = selects the direct path to ground shown in Figure 20 (default).
5
Low power mode reference select.
1 = enables the precision voltage reference in either low power mode or low power plus mode. Enabling the precision
voltage reference in low power modes requires additional current and therefore results in increased current consumption.
0 = enables the low power voltage reference in either low power mode or low power plus mode (default).
4 to 3
ADC power mode configuration.
00 = ADC normal mode. If enabled, the ADC operates with normal current consumption, yielding optimum electrical
performance.
01 = ADC low power mode. If enabled, the I-ADC operates with reduced current consumption. This limitation in current
consumption is achieved, but at the expense of degrading ADC noise performance, by fixing the gain to 128 and using
the on-chip low power 131 kHz oscillator to directly drive the ADC circuits.
10 = ADC low power plus mode. If this bit is enabled, the ADC operates with reduced current consumption. In this
mode, the gain is fixed to 512 and the current consumed is approximately 200 μA more than the ADC low power mode.
The additional current consumed also ensures that the ADC noise performance is better than that achieved in ADC low
power mode.
11 = not defined.
2 to 0
ADC operation mode configuration.
000 = ADC power-down mode. All ADC circuits, including the internal reference, are powered down.
001 = ADC continuous conversion mode. In this mode, any enabled ADC continuously converts.
010 = ADC single conversion mode. In this mode, any enabled ADC performs a single conversion. The ADC enters idle
mode when the single conversion is complete. A single conversion takes two to three ADC clock cycles, depending on the
chop mode.
011 = ADC idle mode. In this mode, the ADC is fully powered on but is held in reset.
100 = ADC self-offset calibration. In this mode, an offset calibration is performed on any enabled ADC using an internally
generated 0 V. The calibration is carried out at the user programmed ADC settings; therefore, as with a normal single ADC
conversion, it takes two to three ADC conversion cycles before a fully settled calibration result is ready. The calibration result is
automatically written to the ADCxOF MMR of the respective ADC. The ADC returns to idle mode and the calibration and
conversion ready status bits are set at the end of an offset calibration cycle.
101 = ADC self-gain calibration. In this mode, a gain calibration to an internal reference voltage is performed on all enabled
ADCs. A gain calibration is a two-stage process and takes twice the time of an offset calibration. The calibration result is
automatically written to the ADCxGN MMR of the respective ADC. The ADC returns to idle mode, and the calibration and
conversion ready status bits are set at the end of a gain calibration cycle. An ADC self-gain calibration should only be
performed on the current channel ADC. Preprogrammed, factory-set calibration coefficients (downloaded automatically
from internal Flash/EE) should be used for voltage temperature measurements. If an external NTC is used, an ADC self-
calibration should be performed on the temperature channel.
110 = ADC system zero-scale calibration. In this mode, a zero-scale calibration is performed on enabled ADC channels
to an external zero-scale voltage driven at the ADC input pins. The calibration is performed at the user programmed
ADC settings; therefore, as with a single ADC conversion, three ADC conversion cycles are required before a fully settled
calibration result is available.
111 = ADC system full-scale calibration. In this mode, a full-scale calibration is performed on enabled ADC channels to
an external full-scale voltage driven at the ADC input pins.
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