參數(shù)資料
型號: ADUC7034BCPZ-RL
廠商: Analog Devices Inc
文件頁數(shù): 109/136頁
文件大?。?/td> 0K
描述: IC MCU FLASH 32K ANLG IO 48LFCSP
標(biāo)準(zhǔn)包裝: 2,500
系列: MicroConverter® ADuC7xxx
核心處理器: ARM7
芯體尺寸: 16/32-位
速度: 20.48MHz
連通性: LIN,SPI,UART/USART
外圍設(shè)備: POR,PSM,溫度傳感器,WDT
輸入/輸出數(shù): 9
程序存儲器容量: 32KB(16K x 16)
程序存儲器類型: 閃存
RAM 容量: 1K x 32
電壓 - 電源 (Vcc/Vdd): 3.5 V ~ 18 V
數(shù)據(jù)轉(zhuǎn)換器: A/D 2x16b
振蕩器型: 內(nèi)部
工作溫度: -40°C ~ 115°C
封裝/外殼: 48-VFQFN 裸露焊盤,CSP
包裝: 帶卷 (TR)
ADuC7034
Rev. B | Page 74 of 136
TIMER0—LIFETIME TIMER
Timer0 is a general-purpose, 48-bit up counter or a 16-bit
up/down counter timer with a programmable prescaler. Timer0
can be clocked from either the core clock or the low power
32.768 kHz oscillator with a prescaler of 1, 16, 256, or 32,768.
When the core is operating at 20.48 MHz with a prescaler of 1,
a minimum resolution of 48.83 ns results.
In 48-bit mode, Timer0 counts up from 0. The current counter
value can be read from T0VAL0 and T0VAL1.
In 16-bit mode, Timer0 can count up or down. A 16-bit value
can be written to T0LD to load into the counter. The current
counter value is read from T0VAL0. Timer0 has a capture
register (T0CAP) that is triggered by a selected IRQ source
initial assertion. When the capture register is triggered, the
current timer value is copied to T0CAP and the timer continues
running. This feature can be used to determine the assertion of
an event with more accuracy than would be provided by
servicing an interrupt alone.
Timer0 reloads the value from T0LD when Timer0 overflows.
The Timer0 interface consists of six MMRS.
T0LD is a 16-bit register holding the 16-bit value that is loaded
into the counter. T0LD is only available in 16-bit mode.
T0CAP is a 16-bit register that holds the 16-bit value
captured by an enabled IRQ event. T0CAP is only available
in 16-bit mode.
T0VAL0/T0VAL1 are 16-bit and 32-bit registers that hold
the 16 LSBs and 32 MSBs, respectively. T0VAL0 and
T0VAL1 are read only registers. In 16-bit mode, 16-bit
T0VAL0 is used. In 48-bit mode, both 16-bit T0VAL0 and
32-bit T0VAL1 are used.
T0CLRI is an 8-bit register. Writing any value to this
register clears the interrupt. T0CLRI is only available in
16-bit mode.
T0CON is a configuration MMR and is described in Table 52.
Timer0 Load Register
Name:
T0LD
Address:
0xFFFF0300
Default Value:
0x0000
Access:
Read/write
Function:
T0LD0 is the 16-bit register holding the 16-bit
value that is loaded into the counter. This
register is only available in 16-bit mode.
Timer0 Clear Register
Name:
T0CLRI
Address:
0xFFFF0310
Access:
Write only
Function:
This 8-bit, write only MMR is written (with
any value) by user code to clear the interrupt.
Timer0 Value Registers
Name:
T0VAL0, T0VAL1
Address:
0xFFFF0304, 0xFFFF0308
Default Value:
0x0000, 0x00000000
Access:
Read access only
Function:
T0VAL0 and T0VAL1 are 16-bit and 32-bit
registers that hold the 16 LSBs and 32 MSBs,
respectively. T0VAL0 and T0VAL1 are read only
registers. In 16-bit mode, 16-bit T0VAL0 is
used. In 48-bit mode, both 16-bit T0VAL0 and
32-bit T0VAL1 are used.
Timer0 Capture Register
Name:
T0CAP
Address:
0xFFFF0314
Default Value:
0x0000
Access:
Read access only
Function:
This is a 16-bit register that holds the 16-bit
value captured by an enabled IRQ event. This
register is only available in 16-bit mode.
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