參數(shù)資料
型號： ADUC7034BCPZ-RL
廠商： Analog Devices Inc
文件頁數(shù)： 46/136頁
文件大?。?/td> 0K
描述： IC MCU FLASH 32K ANLG IO 48LFCSP
標(biāo)準(zhǔn)包裝： 2,500
系列： MicroConverter® ADuC7xxx
核心處理器： ARM7
芯體尺寸： 16/32-位
速度： 20.48MHz
連通性： LIN，SPI，UART/USART
外圍設(shè)備： POR，PSM，溫度傳感器，WDT
輸入/輸出數(shù)： 9
程序存儲器容量： 32KB（16K x 16）
程序存儲器類型： 閃存
RAM 容量： 1K x 32
電壓 - 電源 (Vcc/Vdd)： 3.5 V ~ 18 V
數(shù)據(jù)轉(zhuǎn)換器： A/D 2x16b
振蕩器型： 內(nèi)部
工作溫度： -40°C ~ 115°C
封裝/外殼： 48-VFQFN 裸露焊盤，CSP
包裝： 帶卷 (TR)
ADuC7034
Rev. B | Page 17 of 136
Pin No.
Mnemonic
Type1
Description
11
NTRST
I
JTAG Test Reset. This reset input pin is one of the standard 5-pin JTAG debug ports on the part.
NTRST is an input pin only and has an internal weak pull-down resistor. This pin should be left
unconnected when not in use. NTRST is also monitored by the on-chip kernel to enable LIN
boot load mode.
12
TMS
I
JTAG Test Mode Select. This mode select input pin is one of the standard 5-pin JTAG debug
ports on the part. TMS is an input pin only and has an internal weak pull-up resistor. This pin
should be left unconnected when not in use.
13
VBAT
I
Battery Voltage Input to Resistor Divider.
14
VREF
I
External Reference Input Terminal. When this input is not used, connect it directly to the AGND
system ground. This pin should be left unconnected when not in use.
15
GND_SW
I
Switch to Internal Analog Ground Reference. This pin is the negative input for the external
temperature channel and the external reference. When this input is not used, connect it directly
to the AGND system ground.
18
VTEMP
I
External Pin for NTC/PTC Temperature Measurement.
19
IIN+
I
Positive Differential Input for Current Channel.
20
IIN
I
Negative Differential Input for Current Channel.
21, 22
AGND
S
Ground Reference for On-Chip Precision Analog Circuits.
24
REG_AVDD
S
Nominal 2.6 V Output from On-Chip Regulator.
27
GPIO_0/IRQ0/SS
I/O
General-Purpose Digital IO 0/External Interrupt Request 0 (Active High)/Slave Select Input (SPI
Interface). By default and after a power-on reset, this pin is configured as an input. The pin has
an internal weak pull-up resistor and should be left unconnected when not in use.
28
GPIO_1/SCLK
I/O
General-Purpose Digital IO 1/Serial Clock Input (SPI Interface). By default and after a power-on
reset, this pin is configured as an input. The pin has an internal weak pull-up resistor and should
be left unconnected when not in use.
29
GPIO_2/MISO
I/O
General-Purpose Digital IO 2/Master Input, Slave Output (SPI Interface). By default and after a
power-on reset, this pin is configured as an input. The pin has an internal weak pull-up resistor
and should be left unconnected when not in use.
30
GPIO_3/MOSI
I/O
General-Purpose Digital IO 3/Master Output, Slave Input (SPI Interface). By default and after a
power-on reset, this pin is configured as an input. The pin has an internal weak pull-up resistor
and should be left unconnected when not in use.
31
GPIO_4/ECLK
I/O
General-Purpose Digital IO 4/2.56 MHz Clock Output. By default and after a power-on reset, this
pin is configured as an input. The pin has an internal weak pull-up resistor and should be left
unconnected when not in use.
33
REG_DVDD
S
Nominal 2.6 V Output from the On-Chip Regulator.
36
XTAL1
O
Crystal Oscillator Output. If an external crystal is not used, this pin should be left unconnected.
37
XTAL2
I
Crystal Oscillator Input. If an external crystal is not used, connect this pin to the DGND system
ground.
41
WU
I/O
High Voltage Wake-Up. This high voltage I/O pin has an internal 10 kΩ pull-down resistor and a
high-side driver to VDD. If this pin is not being used, it should not be connected externally.
42
VDD
S
Battery Power Supply to On-Chip Regulator.
44
VSS
S
Ground Reference. This is the ground reference for the internal voltage regulators.
46
STI
I/O
High Voltage Serial Test Interface Output. If this pin is not used, externally connect it to the
IO_VSS ground reference.
47
IO_VSS
S
Ground Reference for High Voltage I/O Pins.
48
LIN/BSD
I/O
Local Interconnect Network IO/Bit Serial Device IO. This is a high voltage pin.
EPAD
Exposed Pad
The exposed pad should be connected to digital ground.
1 I = input, O = output, S = supply.
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