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XRT86VL30
167
SINGLE T1/E1/J1 FRAMER/LIU COMBO - T1 REGISTER DESCRIPTION
REV. 1.0.1
TABLE 148: LIU GLOBAL CONTROL REGISTER 5 (LIUGCR5)
HEX ADDRESS: 0X0FEA
BIT
FUNCTION
TYPE
DEFAULT
DESCRIPTION-OPERATION
7-1
Reserved
-
0
These bits are reserved
0
GCHIS0
RUR/
WC
0
Global Channel 0 Interrupt Status Indicator
This Reset-Upon-Read bit field indicates whether or not an interrupt
has occurred on Channel 0 within the XRT86VL30 device since the
last read of this register.
0 = Indicates that No interrupt has occurred on Channel 0 within the
XRT86VL30 device since the last read of this register.
1 = Indicates that an interrupt has occurred on Channel 0 within the
XRT86VL30 device since the last read of this register.