TABLE
參數(shù)資料
型號： XRT86VL30IV-F
廠商： Exar Corporation
文件頁數(shù)： 77/175頁
文件大?。?/td> 0K
描述： IC FRAMR/LIU T1/E1/J1 QD 128LQFP
標(biāo)準(zhǔn)包裝： 72
控制器類型： T1/E1/J1 調(diào)幀器，LIU
電源電壓： 3.3V
工作溫度： -40°C ~ 85°C
安裝類型： 表面貼裝
封裝/外殼： 128-LQFP
供應(yīng)商設(shè)備封裝： 128-LQFP（14x20）
包裝： 托盤
其它名稱： 1016-1485
XRT86VL30IV-F-ND
XRT86VL30
163
SINGLE T1/E1/J1 FRAMER/LIU COMBO - T1 REGISTER DESCRIPTION
REV. 1.0.1
TABLE 144: LIU GLOBAL CONTROL REGISTER 1 (LIUGCR1)
HEX ADDRESS: 0X0FE1
BIT
FUNCTION
TYPE
DEFAULT
DESCRIPTION-OPERATION
7
TxSYNC(Sect 13)
R/W
0
G.703 Section 13 Transmit Pulse
When this bit is set to ’1’, the LIU transmitter will send a T1 syn-
chrnonous waveform as described in Section 13 of ITU-T G.703,
except with frequency equal to 1.544MHz. This register bit takes pri-
ority over every other LIU setting on the transmit path.
0 = T1 pulse specified in EQC bits
1 = Section 13 Synchronous Pulse at 1.544MHz
6
RxSYNC(Sect 13)
R/W
0
G.703 Section 13 Receiver
When this bit is set to ’1’, the CDR block of the receiver is configured
to accept a waveform as described in Section 13 of ITU-T G.703
except with frequency equal to 1.544MHz.
0 = Normal T1 (Equalizer Bit Settings - EQU[4:0])
1 = Section 13 Synchronous Pulse at 1.544MHz
NOTE:
1. For the RxSync(Sect 13) mode, bit 1 in this register
(0xFE1) must be set to ’1’ to enable ExLOS. This only
applies to the receiver.
NOTE: 2. If RLOS is required to meet G.775 in this mode (and not
ExLOS), then the CLOS[5:0] bits in Register 0x0F07 can be
used. See Register 0x0F07 for more details.
5-4
Gauge [1:0]
R/W
00
Wire Gauge Selector [1:0]:
This bit together with Guage0 bit (bit 4 within this register) are used
to select the wire gauge size as shown in the table below.
3
Reserved
This bit is not used
2
RXMUTE
R/W
0
Receive Output Mute:
This bit permits the user to configure the Receive T1 Block to auto-
matically pull its Recovered Data Output pins to GND anytime (and
for the duration that) the Receive T1 LIU Block declares the LOS
defect condition.
In other words, if this feature is enabled, the Receive T1 LIU Block
will automatically “mute” the Recovered data that is being routed to
the Receive T1 Framer block anytime (and for the duration that) the
Receive T1 LIU Block declares the LOS defect condition.
0 – Disables the “Muting upon LOS” feature.
1 – Enables the “Muting upon LOS” feature.
NOTE: The receive clock is not muted when this feature is enabled.
GAUGE1
0
1
0
GAUGE0
0
1
0
1
Wire Size
22 and 24 Gauge
26 Gauge
24 Gauge
22 Gauge
相關(guān)PDF資料
PDF描述
XRT86VL32IB-F IC LIU/FRAMER T1/E1/J1 2CH 225BG
XRT86VL34IB-F IC LIU/FRAMER T1/E1/J1 4CH 225BG
XRT86VL38IB484-F IC LIU/FRAMER T1/E1/J1 8CH 484BG
XRT86VX38IB329-F IC TI/E1/J1 FRAMER/LIU 329FPBGA
XRT94L31IB-L IC MAPPER DS3/E3/STS-1 504TBGA
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
XRT86VL30IV-F 制造商:Exar Corporation 功能描述:T1/E1 Framer Combo IC
XRT86VL32 制造商:EXAR 制造商全稱:EXAR 功能描述:DUAL T1/E1/J1 FRAMER/LIU COMBO - T1 REGISTER DESCRIPTION
XRT86VL32_07 制造商:EXAR 制造商全稱:EXAR 功能描述:DUAL T1/E1/J1 FRAMER/LIU COMBO - E1 REGISTER DESCRIPTION
XRT86VL32_0709 制造商:EXAR 制造商全稱:EXAR 功能描述:DUAL T1/E1/J1 FRAMER/LIU COMBO - HARDWARE DESCRIPTION
XRT86VL32_1 制造商:EXAR 制造商全稱:EXAR 功能描述:DUAL T1/E1/J1 FRAMER/LIU COMBO - HARDWARE DESCRIPTION
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。

采購需求

(若只采購一條型號，填寫一行即可)

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進(jìn)入我的后臺，查看報價

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進(jìn)入我的后臺，查看報價

*型號 *數(shù)量 廠商 批號 封裝
添加更多采購

我的聯(lián)系方式

*
*
*