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XRT86VL30
74
REV. 1.0.1
SINGLE T1/E1/J1 FRAMER/LIU COMBO - T1 REGISTER DESCRIPTION
BIT 7 - Transmit Abort Sequence Enable
By default, the transmitter will send an IDLE flag after the SSM message (unless continous is set). To send an Abort
sequence to over write the IDLE flag, set this bit to ’1’.
} 0 - Disabled
} 1 - Enable TxABORT
BITS [6:5] - Receive Match Filter Bits
These bits are used to set the number of consecutive error free patterns that must be received before the receive Match
Event is set. This filter can be set to any message, not just a Valid SSM message. This filter does NOT apply to the
RFDL valid message or alarm indication. The RFDL alarm and valid register have their own filter. See BITS [2:1] of this
register.
} 00 - None
} 01 - 3 consecutive patterns
} 10 - 5 consecutive patterns
} 11 - 7 consecutive patterns
BIT 4 - Receive BOC Enable
This bit is used to enable the BOC receiver. If this bit is set to "0", only standard BOS messages will be processed by
the HDLC controller. For clarification, BOC messages can only be processed through the FDL bits.
} 0 - Disabled
} 1 - Enable Receive BOC
BIT 3 - BOC Reset
This bit is used to reset the receive BOC controller. The function of this bit is to reset all the BOC register values to their
default values, except the BOC Interrupt registers. This register bit is automatically set back to ’0’ so that the user only
needs to write ’1’ to send a subsequent reset.
} 1 - Reset BOC
BITS [2:1] - Receive BOC Filter Bits
These bits are used to set the number of consecutive error free patterns that must be received before the receive BOC
alarm indication is set and the RFDL Valid Register is updated. This filter does NOT apply to the RFDL Matching Event
registers. The 3 RFDL Matching Event Registers have a separate filter that applies equally to all three matching
registers. Therefore, there are a total of 2 filters.
} 00 - None
} 01 - 3 consecutive patterns
} 10 - 5 consecutive patterns
} 11 - 7 consecutive patterns
BIT 0 - Send BOC Message
This bit is used to transmit the stored BOC message in the transmit FDL register. This register bit is automatically set
back to ’0’ so that the user only needs to write ’1’ to send a subsequent BOC message.
} 0 - Normal Operation
} 1 - Send BOC Message
TABLE 57: SSM BOC CONTROL REGISTER (BOCCR 0X0170H)
BIT7
BIT6
BIT5
BIT4
BIT3
BIT2
BIT1
BIT0
TxABORT
RMF[1:0]
RBOCE
BOCR
RBF[1:0]
SBOC
R/W
Auto Clear
R/W
Auto Clear
0