參數(shù)資料
型號: XCF128XFTG64C
廠商: Xilinx Inc
文件頁數(shù): 37/88頁
文件大?。?/td> 0K
描述: IC PROM SRL 128M GATE 64-FTBGA
標(biāo)準(zhǔn)包裝: 1
可編程類型: 系統(tǒng)內(nèi)可編程
存儲容量: 128Mb
電源電壓: 1.7 V ~ 2 V
工作溫度: -40°C ~ 85°C
封裝/外殼: 64-TBGA
供應(yīng)商設(shè)備封裝: 64-TFBGA
包裝: 托盤
產(chǎn)品目錄頁面: 601 (CN2011-ZH PDF)
其它名稱: 122-1578
Platform Flash XL High-Density Configuration and Storage Device
DS617 (v3.0.1) January 07, 2010
Product Specification
42
R
Program and Erase Times and Endurance Cycles
Table 21 lists both program and erase times plus the number of program/erase cycles per block. Exact erase times can vary
depending on the memory array condition. The best case is when all the bits in the block are at ‘0’ (pre-programmed). The
worst case is when all the bits in the block are at ‘1’ (not preprogrammed). Usually, the system overhead is negligible with
respect to the erase time. The maximum number of program/erase cycles depends on the VPP voltage supply used.
Table 21: Program/Erase Times and Endurance Cycles(1,2)
Parameter
Condition
Min
Typ
Typical after 10k
P/E Cycles
Max
Unit
V
PP
=
V
DD
Q
Erase
Parameter Block (16 Kword)
0.4
1
2.5
s
Main Block (64
Kword)
Preprogrammed
1.2
3
4
s
Not Preprogrammed
1.5
4
s
Program(3)
Single Word
Word Program
12
180
μs
Buffer Program
12
180
μs
Buffer (32 words) (Buffer Program)
384
μs
Main Block (64 Kword)
768
ms
Suspend
Latency
Program
5
10
μs
Erase
5
25
μs
Program/Erase
Cycles (per
Block)
Main Blocks
10,000
cycles
Parameter Blocks
10,000
cycles
V
PP
=
V
PPH
Erase
Parameter Block (16 Kword)
0.4
2.5
s
Main Block (64 Kword)
1
4
s
Program(3)
Single Word
Word Program
10
170
μs
Buffer Enhanced
Factory Program(4)
2.5
μs
Buffer (32 words)
Buffer Program
80
μs
Buffer Enhanced
Factory Program
–80
μs
Main Block (64
Kwords)
Buffer Program
160
ms
Buffer Enhanced
Factory Program
–160
ms
Bank (8 Mbits)
Buffer Program
1.28
s
Buffer Enhanced
Factory Program
–1.28
s
Program/Erase
Cycles (per
Block)
Main Blocks
1000
cycles
Parameter Blocks
2500
cycles
Blank Check
Main Blocks
16
ms
Parameter Blocks
4
ms
Notes:
1.
TA = –25°C to 85 °C; VDD = 1.7V to 2V; VDDQ = 2.3V to 2.7V or 3.0V to 3.6V.
2.
Values are liable to change with the external system-level overhead (command sequence and Status Register polling execution).
3.
Excludes the time needed to execute the command sequence.
4.
This is an average value on the entire device.
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