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CHAPTER 4 BUS CONTROL FUNCTION
166
Preliminary User’s Manual U16031EJ2V1UD
4.9.5 Tag clear function
The tag of one way is cleared (invalidated).
After reset, all the ways, tags, and LRU are automatically cleared (invalidated).
The instruction cache tag is cleared using the following procedure.
<1> The ICC register is read to confirm that both the TCLR0 and TCLR1 bits are cleared to 0.
<2> The ICC register is read to confirm that the LOCKI0 bit is cleared to 0. Bit 13 of the ICC register is always
cleared to 0.
<3> The TCLR0 and TCLR1 bits of the ICC register are set as follows.
Cautions 1. Perform operations <1> to <3> above (tag clear) in an uncached area (the tag is not cleared
from a cacheable area).
To clear both ways 0 and 1 at the same time
(a) Set the TCLR0 and TCLR1 bits to 1.
(b) Read the TCLR0 and TCLR1 bits to confirm that they are cleared to 0.
To clear ways 0 and 1 separatelyNote
(a) Set the TCLR0 bit to 1.
(b) Read the TCLR0 bit to confirm that it is cleared to 0.
(c) Set the TCLR1 bit to 1.
(d) Read the TCLR1 bit to confirm that it is cleared to 0.
Note The ways can be cleared separately also in the order of (c) - (d) - (a) - (b).
2. The counter for clearing the tag of ways 0 and 1 is shared.
Therefore, clear the tag (by setting the TCLR0 or TCLR1 bit of the ICC register) when the
counter for clearing the tag is stopped (when TCLR0 = TCLR1 = 0). When clearing the tags of
ways 0 and 1 separately, the counter stops while a tag is being cleared if the tag of one other
way is cleared while the tag of the other way is being cleared (TCLR0 or TCLR1 = 1).
Consequently, the tag cannot be cleared correctly because the tag of the other way is cleared
with the counter indicating a midway value. Be sure to clear the tag of one other way after
confirming that the tag of the other way has been cleared (TCLR0 or TCLR1 = 0).
There is no problem if both the bits are set at the same time as follows.
mov
0x3, r2
LOP0:
ld.h
ICC[r0], r1
cmp
r0, r1
bnz
LOP0
st.h
r2, ICC[r0]
LOP1:
ld.h
ICC[r0], r1
cmp
r0, r1
bnz
LOP1
3. Do not perform other processing in parallel with clearing the tag until it is confirmed by
reading the TCLR0 and TCLR1 bits of the ICC register that the tag has been cleared to 0.