
9
Preliminary User’s Manual U16031EJ2V1UD
Major Revisions in This Edition (4/4)
Page
Description
p.578
Addition of items in Table 11-2 Correspondence Between Requests and Decoded Values
p.589
Addition of description in 11.4.1 (3) UF0 EPNAK register (UF0EN)
p.599
Deletion of description in 11.4.1 (9) UF0 EP status 1 register (UF0EPS1)
p.601
Modification of description in 11.4.1 (11) UF0 INT status 0 register (UF0IS0)
p.629
Modification of description in 11.4.1 (34) UF0 mode status register (UF0MODS)
p.665
Modification of description in 11.4.3 (2) UF0 EP0 status register L (UF0E0SL)
p.672
Modification of description in 11.4.3 (9) UF0 address register (UF0ADRS)
p.673
Modification of description in 11.4.3 (10) UF0 configuration register (UF0CNF)
p.674
Modification of description in 11.4.3 (11) UF0 interface 0 register (UF0IF0)
p.675
Modification of description in 11.4.3 (12) UF0 interface 1 to 4 registers (UF0IF1 to UF0IF4)
p.677
Modification of Caution 2 in 11.4.3 (14) UF0 device descriptor registers 0 to 17 (UF0DD0 to UF0DD17)
p.678
Modification of Caution 2 in 11.4.3 (15) UF0 configuration/interface/endpoint descriptor registers 0 to
255 (UF0CIE0 to UF0CIE255)
p.680
Modification of Caution in 11.4.4 (1) USB function 0 DMA channel select register (UF0CS)
p.686
Deletion of Caution in Table 11-8 FW-Supported Standard Requests
p.692
Modification of description in Figure 11-15 Automatically Processed Requests for Control Transfer
pp.696, 697, 699,
700, 702 to 704,
706
Modification of description in Figure 11-20 CPUDEC Request for Control Transfer
p.733
Modification of description in Figure 11-30 USB Connection Example
p.739
Addition of value when fX = 150 MHz in Table 12-1 Setting of A/D Conversion Operation Time
p.763
Addition of 12.9 How to Read A/D Converter Characteristics Table
p.767
Modification of repeat frequency in 13.1 Features
p.768
Modification of description in Figure 13-1 Block Diagram of PWM Unit
p.770
Modification of description in 13.3 (1) PWM control registers 0 and 1 (PWMC0 and PWMC1)
p.775
Modification of description in 13.4.2 (1) Setting for starting PWM operation
p.779
Modification of description in Table 13-1 Repeat Cycle of PWMn
p.839
Modification of Caution in 14.3.8 Port DH
p.843
Modification of Caution and description on bit 0 in 14.3.8 (2) (c) Port DH function control register (PFCDH)
p.853
Addition to Caution in 14.3.10 (2) (c) Port CT function control register (PFCCT)
p.866
Addition of noise elimination width when fX = 150 MHz in Table 14-4
Relationship Between NCW1n
Register Set Value and Noise Elimination Width
p.873
Modification of value of program counter (PC) after reset in Table 15-2 Initial Value of CPU, Internal Data
RAM, Internal Instruction RAM, and On-Chip Peripheral I/O After Reset
p.880
Modification of description in 16.1.1 (7) Mask function
p.885
Addition of CHAPTER 17 ELECTRICAL SPECIFICATIONS (TARGET VALUES)
p.928
Addition of CHAPTER 18 PACKAGE DRAWING
p.929
Addition of CHAPTER 19 RECOMMENDED SOLDERING CONDITIONS
p.952
Addition to Note in B.2 Instruction Set (in Alphabetical Order)
p.953
Addition of APPENDIX C REVISION HISTORY
The mark
shows major revised points.