![](http://datasheet.mmic.net.cn/190000/UPD703111GM-10-UEU_datasheet_14990899/UPD703111GM-10-UEU_100.png)
CHAPTER 3 CPU FUNCTION
100
Preliminary User’s Manual U16031EJ2V1UD
(16/26)
Bit Units for Manipulation
Address
Function Register Name
Symbol
R/W
1 Bit
8 Bits 16 Bits
After Reset
FFFFFEF6H
UF0 configuration/interface/
endpoint descriptor register 19
UF0CIE19
R/W
√
Undefined
FFFFFEF7H
UF0 configuration/interface/
endpoint descriptor register 20
UF0CIE20
R/W
√
Undefined
FFFFFEF8H
UF0 configuration/interface/
endpoint descriptor register 21
UF0CIE21
R/W
√
Undefined
FFFFFEF9H
UF0 configuration/interface/
endpoint descriptor register 22
UF0CIE22
R/W
√
Undefined
FFFFFEFAH
UF0 configuration/interface/
endpoint descriptor register 23
UF0CIE23
R/W
√
Undefined
FFFFFEFBH
UF0 configuration/interface/
endpoint descriptor register 24
UF0CIE24
R/W
√
Undefined
FFFFFEFCH
UF0 configuration/interface/
endpoint descriptor register 25
UF0CIE25
R/W
√
Undefined
FFFFFEFDH
UF0 configuration/interface/
endpoint descriptor register 26
UF0CIE26
R/W
√
Undefined
FFFFFEFEH
UF0 configuration/interface/
endpoint descriptor register 27
UF0CIE27
R/W
√
Undefined
FFFFFEFFH
UF0 configuration/interface/
endpoint descriptor register 28
UF0CIE28
R/W
√
Undefined
FFFFFF00H
UF0 configuration/interface/
endpoint descriptor register 29
UF0CIE29
R/W
√
Undefined
FFFFFF01H
UF0 configuration/interface/
endpoint descriptor register 30
UF0CIE30
R/W
√
Undefined
FFFFFF02H
UF0 configuration/interface/
endpoint descriptor register 31
UF0CIE31
R/W
√
Undefined
FFFFFF03H
UF0 configuration/interface/
endpoint descriptor register 32
UF0CIE32
R/W
√
Undefined
FFFFFF04H
UF0 configuration/interface/
endpoint descriptor register 33
UF0CIE33
R/W
√
Undefined
FFFFFF05H
UF0 configuration/interface/
endpoint descriptor register 34
UF0CIE34
R/W
√
Undefined
FFFFFF06H
UF0 configuration/interface/
endpoint descriptor register 35
UF0CIE35
R/W
√
Undefined
FFFFFF07H
UF0 configuration/interface/
endpoint descriptor register 36
UF0CIE36
R/W
√
Undefined
FFFFFF08H
UF0 configuration/interface/
endpoint descriptor register 37
UF0CIE37
R/W
√
Undefined
FFFFFF09H
UF0 configuration/interface/
endpoint descriptor register 38
UF0CIE38
R/W
√
Undefined
FFFFFF0AH
UF0 configuration/interface/
endpoint descriptor register 39
UF0CIE39
R/W
√
Undefined
FFFFFF0BH
UF0 configuration/interface/
endpoint descriptor register 40
UF0CIE40
R/W
√
Undefined