參數(shù)資料
型號(hào)： UPD30181AYF1-131-GA3
廠商： NEC Corp.
英文描述： 64-/32-BIT MICROPROCESSOR
中文描述： 64-/32-BIT微處理器
文件頁(yè)數(shù)： 34/72頁(yè)
文件大?。?/td> 447K
代理商： UPD30181AYF1-131-GA3
Data Sheet U16277EJ1V0DS
34
μ
PD30181A, 30181AY
(2/3)
Pin Name
I/O
I/O Circuit Type
Recommended Connection of Unused Pins
ENAB/M/BMODE0
Note
I/O
A
Connect to VDD3 or GND3 via a resistor
FPD15/CF1_READY/GPIO51
I/O
A
Leave open
FPD14/CF1_STSCHG#/GPIO50
I/O
A
Leave open
FPD(13:12)/CF1_CE(2:1)#/GPIO(49:48)
I/O
A
Leave open
FPD(11:10)/CF1_CD(2:1)#/GPIO(47:46)
I/O
A
Leave open
FPD(9:4)/GPIO(45:40)
I/O
A
Leave open
FPD(3:0)
O
A
Leave open
VPLCD/GPO62
O
A
Leave open
VPBIAS/GPO63
O
A
Leave open
CF1_RESET/DBUS32
Note
I/O
B
Connect to VDD3 or GND3 via a resistor
CF1_DIR/KPORT4/GPIO39
I/O
B
Leave open
CF1_EN#/KPORT5/GPIO38
I/O
B
Leave open
CF1_VCCEN#/KSCAN4/GPIO37
I/O
B
Leave open
CF0_CD(2:1)#/GPIO(36:35)
I/O
B
Leave open
CF0_IOIS16#/GPIO34
I/O
B
Leave open
CF_WAIT#/GPIO33
I/O
B
Leave open
CF0_CE(2:1)#/GPIO(32:31)
I/O
B
Leave open
CF0_STSCHG#/GPIO30
I/O
B
Leave open
CF0_READY/GPIO29
I/O
B
Leave open
CF0_RESET/GPIO28
I/O
B
Leave open
CF0_DIR/GPIO27
I/O
B
Leave open
CF0_EN#/GPIO26
I/O
B
Leave open
CF_REG#/GPIO25
I/O
B
Leave open
CF0_VCCEN#/GPIO24
I/O
B
Leave open
SCK/KSCAN11/GPIO23
I/O
B
Leave open
SI/KSCAN10/GPIO22
I/O
B
Leave open
SO/KSCAN9/GPIO21
I/O
B
Leave open
FRM/KSCAN8/GPIO20
I/O
B
Leave open
RxD2/IRDIN
I
B
Leave open
TxD2/IRDOUT/MIPS16EN
Note
I/O
B
Connect to VDD3 or GND3 via a resistor
RTS2#/SYNC/WS/DIVMODE1
Note
I/O
B
Connect to VDD3 or GND3 via a resistor
CTS2#/BITCLK/SCLK
I/O
B
Leave open
DTR2#/SDATAOUT/SDO/DIVMODE0
Note
I/O
B
Connect to VDD3 or GND3 via a resistor
DCD2#/SDATAIN/SDI
I
B
Leave open
DSR2#/SRESET#
I/O
B
Leave open
RxD0
I
B
Connect to VDD3
TxD0/CLKSEL2
Note
I/O
B
Connect to VDD3 or GND3 via a resistor
RTS0#/GPIO19/CLKSEL1
Note
I/O
B
Connect to VDD3 or GND3 via a resistor
Note
The signal level is sampled when the RTCRST# signal has changed to high level.
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