參數(shù)資料
型號(hào): TMC22X5YA
廠商: Fairchild Semiconductor Corporation
英文描述: Multistandard Digital Video Decoder Three-Line Adaptive Comb Decoder Family, 8 & 10 bit
中文描述: 多標(biāo)準(zhǔn)數(shù)字視頻解碼器三線自適應(yīng)梳狀解碼器系列,8
文件頁數(shù): 24/84頁
文件大?。?/td> 417K
代理商: TMC22X5YA
TMC22x5yA
PRODUCT SPECIFICATION
24
REV. 1.0.0 2/4/03
Control Register De
fi
nitions
(continued)
Sync Pulse Generator (11)
7
6
5
4
3
2
1
0
STB
Reg
11
Bit
7-0
Name
STB
Description
Sync to burst.
Controls the number of pixels from sync to burst. This signal
starts the burst sample and hold. In SC mode, subtract 25 from the desired
delay to generate this value.
Sync Pulse Generator (12)
7
6
5
4
3
2
1
0
BTV
Reg
12
Bit
7-0
Name
BTV
Description
Burst to video.
Controls the number of pixels from STB to the start of active
video.
Sync Pulse Generator (13)
7
6
5
4
3
2
1
0
AV
7
AV
6
AV
5
AV
4
AV
3
AV
2
AV
1
AV
0
Reg
13
Bit
7-0
Name
AV
7-0
Description
Active video line 8 lsbs.
Bottom 8 bits of the number of pixels during the
active video line.
Sync Pulse Generator (14)
7
6
5
4
3
2
1
0
Reserved
AV
9
AV
8
Reserved
STS
10
STS
9
STS
8
Reg
14
14
14
14
Bit
7-6
5-4
3
2-0
Name
Reserved
AV
9-8
Reserved
STS
10-8
Description
Reserved, set to zero.
Active video line 2 msbs.
Two most significant bits of AV.
Reserved, set to zero.
Sync to sync 3 msbs.
Three most significant bits of STS.
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