參數(shù)資料
型號(hào)： TMC22X5YA
廠商： Fairchild Semiconductor Corporation
英文描述： Multistandard Digital Video Decoder Three-Line Adaptive Comb Decoder Family, 8 & 10 bit
中文描述： 多標(biāo)準(zhǔn)數(shù)字視頻解碼器三線自適應(yīng)梳狀解碼器系列，8
文件頁數(shù)： 10/84頁
文件大?。?/td> 417K
代理商： TMC22X5YA
TMC22x5yA
PRODUCT SPECIFICATION
10
REV. 1.0.0 2/4/03
2D
2D
2E
2E
2F
2
YOFF1
8
SG1
7-0
SYSPH1
6-0
VAXIS1
SYSPH1
14-7
Video Measurement
Y offset, msb
Msync gain, 2 msbs
7 lsbs of phase
V axis flip
8 msbs of phase
1-0
7-1
0
7-0
30
30
30
30
30
30
30
30
31
32
33
33
33
33
34
35
36
37
37
37
37
38
39
3A
3B
3C
3C
3C
3C
7
6
5
4
3
2
1
0
set to zero
Line grab flag
Line grab enable
Ext line grab enable
reserved, set to zero
Pixel grab gate
Pixel grab enable
Ext pixel grab enable
Pixel grab, 8 lsbs
Line grab, 8 lsbs
reserved, set to zero
Field grab number
Msb of line grab
Pixel grab, 3 msbs
G/Y grab, 8 msbs
B/U grab, 8 msbs
R/V grab, 8 msbs
reserved
G/Y grab, 2 lsbs
B/U grab, 2 lsbs
R/V grab, 2 lsbs
Luma grab, 8 msbs
Msync grab, 8 msbs
U grab, 8 msbs
V grab, 8 msbs
Luma grab, 2 lsbs
Msync grab, 2 lsbs
U grab, 2 lsbs
V grab, 2 lsbs
Test Control
Must be set to zero
Must be set to zero
Vertical Blanking Control
VBIT20
V bit control
PEDDIS
Pedestal control
CCDEN
5-0
Closed caption control
Auto-increment stops at 3F
LGF
LGEN
LGEXT
PGG
PGEN
PGEXT
PG
7-0
LG
7-0
7-0
7-0
7
6-4
3
2-0
7-0
7-0
7-0
7-6
5-4
3-2
1-0
7-0
7-0
7-0
7-0
7-6
5-4
3-2
1-0
FG
LG
8
PG
10-8
GY
9-2
BU
9-2
RV
9-2
GY
1-0
BU
1-0
RV
1-0
Y
9-2
M
9-2
U
9-2
V
9-2
Y
1-0
M
1-0
U
1-0
V
1-0
3D
3E
7-0
7-0
TEST
TEST
3F
3F
3F
7
6
5-0
Reg
Bit
Name
Function
Notes:
1. Functions are listed in the order of reading and writing.
2. For each register listed above up to register 3F, all bits not
specified are reserved and must be set to zero to ensure
proper operation.
Status - Read Only
DDSPH
LINEST
BGST
VACT2
PALODD
VFLY
FGRAB
LGRAB
PGRAB
FLD
VBLK
40
41
41
41
41
41
41
41
41
42
42
7-0
7
6
5
4
3
2
1
0
7
6
DDS phase, 8 msbs
Pixel count reset
Start of burst gate
Half line flag
PAL Ident
Vertical count reset
Field grab
Line grab
Pixel grab
Field flag (F in D1 output)
Vertical blanking (V in D1
output)
Horizontal blanking (H in
D1 output)
Line identification
Y/G overflow
Y/G underflow
C
B
/B overflow
C
B
/B underflow
C
R
/R overflow
C
R
/R underflow
reserved
Color kill active
Frequency/Phase error
DRS signal
Reads back xx
h
Revision number
reserved
42
5
HBLK
42
43
43
43
43
43
43
43
44
44
45
46
47
48-
4A
4B
4B
4B
4C-
FF
4-0
7
6
5
4
3
2
1-0
7
6-0
7-0
7-0
7-0
7-0
LID
YGO
YGU
UBO
UBU
VRO
VRU
MONO
FPERR
DRS
PARTID
REVID
7
PKILL
CFSTAT
XOP
Phase kill from comb fail
Comb filter status
XLUT output
reserved
6-5
4-0
7-0
Reg
Bit
Name
Function
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