- 您現(xiàn)在的位置：買(mǎi)賣(mài)IC網(wǎng) > PDF目錄98080 > SII3114CTU PCI BUS CONTROLLER, PQFP176 PDF資料下載
參數(shù)資料
| 型號(hào)： | SII3114CTU |
| 元件分類(lèi)： | 總線控制器 |
| 英文描述： | PCI BUS CONTROLLER, PQFP176 |
| 封裝： | TQFP-176 |
| 文件頁(yè)數(shù)： | 74/127頁(yè) |
| 文件大?。?/td> | 564K |
| 代理商： | SII3114CTU |
第1頁(yè)第2頁(yè)第3頁(yè)第4頁(yè)第5頁(yè)第6頁(yè)第7頁(yè)第8頁(yè)第9頁(yè)第10頁(yè)第11頁(yè)第12頁(yè)第13頁(yè)第14頁(yè)第15頁(yè)第16頁(yè)第17頁(yè)第18頁(yè)第19頁(yè)第20頁(yè)第21頁(yè)第22頁(yè)第23頁(yè)第24頁(yè)第25頁(yè)第26頁(yè)第27頁(yè)第28頁(yè)第29頁(yè)第30頁(yè)第31頁(yè)第32頁(yè)第33頁(yè)第34頁(yè)第35頁(yè)第36頁(yè)第37頁(yè)第38頁(yè)第39頁(yè)第40頁(yè)第41頁(yè)第42頁(yè)第43頁(yè)第44頁(yè)第45頁(yè)第46頁(yè)第47頁(yè)第48頁(yè)第49頁(yè)第50頁(yè)第51頁(yè)第52頁(yè)第53頁(yè)第54頁(yè)第55頁(yè)第56頁(yè)第57頁(yè)第58頁(yè)第59頁(yè)第60頁(yè)第61頁(yè)第62頁(yè)第63頁(yè)第64頁(yè)第65頁(yè)第66頁(yè)第67頁(yè)第68頁(yè)第69頁(yè)第70頁(yè)第71頁(yè)第72頁(yè)第73頁(yè)當(dāng)前第74頁(yè)第75頁(yè)第76頁(yè)第77頁(yè)第78頁(yè)第79頁(yè)第80頁(yè)第81頁(yè)第82頁(yè)第83頁(yè)第84頁(yè)第85頁(yè)第86頁(yè)第87頁(yè)第88頁(yè)第89頁(yè)第90頁(yè)第91頁(yè)第92頁(yè)第93頁(yè)第94頁(yè)第95頁(yè)第96頁(yè)第97頁(yè)第98頁(yè)第99頁(yè)第100頁(yè)第101頁(yè)第102頁(yè)第103頁(yè)第104頁(yè)第105頁(yè)第106頁(yè)第107頁(yè)第108頁(yè)第109頁(yè)第110頁(yè)第111頁(yè)第112頁(yè)第113頁(yè)第114頁(yè)第115頁(yè)第116頁(yè)第117頁(yè)第118頁(yè)第119頁(yè)第120頁(yè)第121頁(yè)第122頁(yè)第123頁(yè)第124頁(yè)第125頁(yè)第126頁(yè)第127頁(yè)
SiI3114 PCI to Serial ATA Controller
Data Sheet
Silicon Image, Inc.
SiI-DS-0103-D
42
2007 Silicon Image, Inc.
Internal Register Space – Base Address 2
Access to these registers is modified by the “shadow” Channel 1/3 Device Select bit. The “shadow” Channel 1/3
Device Select bit is written from bit 4 of the byte written to the Channel 1/3 Task File Device+Head register (offset
06H).
These registers are 32-bits wide and define the internal operation of the SiI3114. The access types are defined as
follows: R=read, W=write, and C=clearable by some write operation. Access to this register is through the PCI I/O
space. Table 19 shows the internal register space for base 2 addresses.
Table 19. SiI3114 Internal Register Space – Base Address 2
Register Name
Address
Offset
31
16
15
00
Access
Type
00H
Starting Sector
Number
Sector Count
Features (W)
Error (R)
Data
R/W
04H
Command+Status
Device+Head
Cylinder High
Cylinder Low
R/W
Channel 1/3 Task File Register 0
Address Offset: 00H
Access Type: Read/Write
Reset Value: 0x0000_0000
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 09 08 07 06 05 04 03 02 01 00
Starting Sector Number
Sector Count
Features (W) Error (R)
Data (byte access)
Data (word access)
Data (dword access)
This register defines four of the Channel 1/3 Task File registers in the SiI3114. The register bits are also mapped
to Base Address 5, Offset C0H. See “Channel X Task File Register 0” section on page 62 for bit definitions. The
value in the “shadow” Channel 1/3 Device Select bit is used to select the Task File registers for either Channel 1
(Master; bit is 0) or Channel 3 (Slave; bit is 1).
Channel 1/3 Task File Register 1
Address Offset: 04H
Access Type: Read/Write
Reset Value: 0x0000_0000
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 09 08 07 06 05 04 03 02 01 00
Command + Status
Device+Head
Cylinder High
Cylinder Low
This register defines four of the Channel 1/3 Task File registers in the SiI3114. The register bits are also mapped
to Base Address 5, Offset C4H. See “Channel X Task File Register 1” section on page 62 for bit definitions. Except
for writing the Device+Head Task File register, the value in the “shadow” Channel 1/3 Device Select bit is used to
select the Task File registers for either Channel 1 (Master; bit is 0) or Channel 3 (Slave; bit is 1). For writing the
Device+Head Task File register, the value being written to bit 4 of the register (the Device Select bit) is used to
select the Task File register for either Channel 1 (Master; bit is 0) or Channel 3 (Slave; bit is 1); a 0 is always
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| SII3124ACBHU | PCI BUS CONTROLLER, PBGA364 |
| SII3512ECTU128 | PCI BUS CONTROLLER, PQFP128 |
| SII3531ACNU | PCI BUS CONTROLLER, QCC48 |
| SIO10N268-NU | MULTIFUNCTION PERIPHERAL, PQFP128 |
| SIS300 | GRAPHICS PROCESSOR, PBGA365 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| SII3124A | 制造商:SILICONIMAGE 制造商全稱(chēng):SILICONIMAGE 功能描述:PCI-X to Serial ATA Controller |
| SII3124ACBHU | 制造商:SILICONIMAGE 制造商全稱(chēng):SILICONIMAGE 功能描述:PCI-X to Serial ATA Controller |
| SII3132 | 制造商:SILICONIMAGE 制造商全稱(chēng):SILICONIMAGE 功能描述:PCI Express to 2-Port Serial ATA II Host Controller |
| SII3132CNU | 制造商:Silicon Image Inc 功能描述:PCI Express to Serial ATA Controller 88-Pin QFN |
| SII3512 | 制造商:SILICONIMAGE 制造商全稱(chēng):SILICONIMAGE 功能描述:PCI to Serial ATA Controller |
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。