參數(shù)資料
型號: SC16C754B
廠商: NXP Semiconductors N.V.
英文描述: 5 V, 3.3 V and 2.5 V quad UART, 5 Mbit/s (max.) with 64-byte FIFOs
中文描述: 5伏,3.3伏和2.5伏兆5四異步/秒(最大)64字節(jié)的FIFO
文件頁數(shù): 17/50頁
文件大?。?/td> 259K
代理商: SC16C754B
9397 750 14668
Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Product data sheet
Rev. 02 — 13 June 2005
17 of 50
Philips Semiconductors
SC16C754B
5 V, 3.3 V and 2.5 V quad UART, 5 Mbit/s (max.) with 64-byte FIFOs
6.6 DMA operation
There are two modes of DMA operation, DMA mode 0 or DMA mode 1, selected by
FCR[3].
In DMA mode 0 or FIFO disable (FCR[0] = 0) DMA occurs in single character transfers. In
DMA mode 1, multi-character (or block) DMA transfers are managed to relieve the
processor for longer periods of time.
6.6.1
Single DMA transfers (DMA mode 0/FIFO disable)
Figure 11
shows TXRDY and RXRDY in DMA mode 0/FIFO disable.
6.6.1.1
Transmitter
When empty, the TXRDY signal becomes active. TXRDY will go inactive after one
character has been loaded into it.
6.6.1.2
Receiver
RXRDY is active when there is at least one character in the FIFO. It becomes inactive
when the receiver is empty.
Fig 11. TXRDY and RXRDY in DMA mode 0/FIFO disable
TX
wrptr
wrptr
FIFO EMPTY
TXRDY
RX
rdptr
rdptr
FIFO EMPTY
RXRDY
RXRDY
002aaa232
at least one
location filled
at least one
location filled
TXRDY
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