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ORCAORT4622 FPSC
Four-Channel x 622 Mbits/s Backplane Transceiver
Preliminary Data Sheet
March 2000
44
L Lucent Technologies Inc.
LVDS I/O
(continued)
LVDS Receiver Buffer Requirements
Table 23. LVDS Receiver dc Data
* Buffer will not produce output transition when input is open-circuited.
Note: V
DD
= 3.1 V—3.5 V, 0 °C —125 °C slow-fast process.
Table 24. LVDS Receiver ac Data
Table 25. LVDS Receiver Power Consumption
Table 26. LVDS Operating Parameters
Note: Under worst-case operating condition, the LVDS driver will withstand a disabled or unpowered receiver for an
unlimited period of time without being damaged. Similarly, when outputs are short-circuited to each other or to
ground, the LVDS will not suffer permanent damage. The LVDS driver supports hot-insertion. Under a well-controlled environment,
the LVDS I/O can drive backplane as well as cable.
Parameter
Symbol
V
I
Test Conditions
|V
GPD
| < 925 mVdc 1 MHz
Min
0
Typ
1.2
Max
2.4
Unit
V
Receiver Input Voltage Range, V
IA
or
V
IB
Receiver Input Differential Threshold
Receiver Input Differential Hysteresis
Receiver Differential Input Impedance
|V
IDTH
|
V
HYST
R
IN
|V
GPD
| < 925 mV 400 MHz
V
IDTHH
– V
IDTHL
With built-in termination,
center-tapped
–100
—
80
—
—
100
100
—*
120
mV
mV
Symbol
T
PWD
Parameter
Test Conditions
|V
IDTH
| = 100 mV
311 MHz
C
L
= 1.5 pF
Min
—
Max
TBD
Unit
ps
Receiver Output Pulse-width Distortion
T
PLH
,
T
PHL
—
T
RISE
T
FALL
Propagation Delay Time
0.75
0.74
—
150
150
1.65
1.82
50
350
350
ns
With Common-mode Variation, (0 V to 2.4 V)
Receiver Output Signal Rise Time, V
OD
20% to 80%
Receiver Output Signal Fall Time, V
OD
80% to 20%
C
L
= 1.5 pF
C
L
= 1.5 pF
C
L
= 1.5 pF
ps
ps
ps
Symbol
PR
dc
PR
ac
Parameter
Test Conditions
dc
ac, C
L
= 1.5 pF
Min
—
—
Max
34.8
0.026
Unit
mW
Receiver dc Power
Receiver ac Power
mW/MHz
Parameter
Test Conditions
—
—
—
—
—
Min
—
—
–40
3.1
—
Normal
100
50
—
—
0
Max
—
—
125
3.5
—
Unit
°C
V
V
Transmit Termination Resistor
Receiver Termination Resistor
Temperature Range
Power Supply V
DD
Power Supply V
SS