參數(shù)資料
型號： OMAP5910(RISC)
英文描述： Dual-Core Processor
中文描述： 雙核處理器
文件頁數(shù)： 112/160頁
文件大?。?/td> 1997K
代理商： OMAP5910(RISC)
Functional Overview
100
August 2002 Revised August 2003
SPRS197B
Table 373. MPU Level 1 and Level 2 Interrupt Mappings (Continued)
LEVEL 1
MAPPING
SENSITIVITY
INTERRUPT
FUNCTION
LEVEL 2
MAPPING
DEFAULT
USB_HHC1
Level
IRQ_0
IRQ_6
USB Host HHC1 Interrupt
Reserved
IRQ_0
IRQ_7
Reserved
IRQ_0
IRQ_8
Reserved
IRQ_0
IRQ_9
MCBSP3_TX_INT
Edge
IRQ_0
IRQ_10
McBSP3 Transmit Interrupt
MCBSP3_RX_INT
Edge
IRQ_0
IRQ_11
McBSP3 Receive Interrupt
MCBSP1_TX_INT
Edge
IRQ_0
IRQ_12
McBSP1 Transmit Interrupt
MCBSP1_RX_INT
Edge
IRQ_0
IRQ_13
McBSP1 Receive Interrupt
UART1
Level
IRQ_0
IRQ_14
UART1 Interrupt
UART2
Level
IRQ_0
IRQ_15
UART2 Interrupt
MCSI1_TX_RX_FE_INT
Level
IRQ_0
IRQ_16
MCSI1 Combined
Transmit/Receive/Frame Error Interrupt
MCSI2_TX_RX_FE_INT
Level
IRQ_0
IRQ_17
MCSI2 Combined
Transmit/Receive/Frame Error Interrupt
Reserved
IRQ_0
IRQ_18
Reserved, keep masked
Reserved
IRQ_0
IRQ_19
Reserved, keep masked
USB_CLNT_GENI_INT
Level
IRQ_0
IRQ_20
USB Function General-Purpose Interrupt
1WIRE_INT
Level
IRQ_0
IRQ_21
1-Wire Interface Interrupt
TIMER_32K_INT
Edge
IRQ_0
IRQ_22
32k Timer Interrupt
MMC_INT
Level
IRQ_0
IRQ_23
MMC/SD Interrupt
ULPD_INT
Level
IRQ_0
IRQ_24
Ultra-Low Power Device module Interrupt
RTC_PERIODIC_TIMER
Edge
IRQ_0
IRQ_25
Real-Time Clock Periodic Timer Interrupt
RTC_ALARM
Level
IRQ_0
IRQ_26
Real-Time Clock Alarm Interrupt
Reserved
IRQ_0
IRQ_27
DSPMMU_IRQ
Level
IRQ_0
IRQ_28
DSP MMU Interrupt
USB_FUNC_IRQ_ISO_ON
Level
IRQ_0
IRQ_29
USB Function Isochronous On Interrupt
USB_FUNC_IRQ_NONISO_ON
Level
IRQ_0
IRQ_30
USB Function Non-Isochronous On
Interrupt
MCBSP2_RX_OVERFLOW_INT
Edge
IRQ_0
IRQ_31
McBSP2 Receive Overflow Interrupt
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