參數(shù)資料
型號: MT90220AL
廠商: Mitel Networks Corporation
英文描述: Octal IMA/UNI PHY Device
中文描述: 八路IMA的/單向物理層設(shè)備
文件頁數(shù): 93/116頁
文件大小: 306K
代理商: MT90220AL
MT90220
85
9.0 AC/DC Characteristics
* Exceeding these values may cause permanent damage. Functional Operation under these conditions is not implied.
Note: Input pins are 5 Volt compatible type
Recommended Operating Conditions -
Voltages are with respect to ground (Vss) unless otherwise stated
Typical figures are at 25
°
C, V
DD
=3.3V, and for design aid only: not guaranteed and not subject to production testing
DC Electrical Characteristics* -
Voltages are with respect to ground (Vss) unless otherwise stated
Absolute Maximum Conditions*
Parameter
Symbol
Min
Max
Units
1
Supply Voltage
V
DD
V
I
I
I
T
ST
-0.3
3.9
V
2
Voltage at Digital Inputs
-1.0
6.5
V
3
Current at Digital Inputs
-10
10
mA
4
Storage Temperature
-40
125
C
Characteristics
Sym
Min
Typ
Max
Units
Test Conditions
1
Operating Temperature
T
OP
V
DD
-40
85
C
2
Supply Voltage
3.0
3.3
3.6
V
Characteristics
Sym
Min
Typ
Max
Units
Test Conditions
1
Supply Current
I
DD
150
300
mA
System Clock 25 MHz. PCM clock @
2.048MHz
2
Input High Voltage
(Digital Inputs)
V
IH
2.0
5.5
V
3
Input Low Voltage
(Digital Inputs)
V
IL
-0.5
0.8
V
4
Input Leakage
(Digital Inputs)
I
IL
1
10
μ
A
V
I
= 0 to V
DD
5
Input Leakage
I
IL
-35
-115
-214
μ
A
For pins DSTi[7:0], REFCK[3:0],
TXCKio[7:0], TXSYNC[7:0],
RXSYNCi[7:0], RXCKi[7:0], TDI,
TEST1, TMS, TCK
6
Input Leakage
I
IL
C
I
V
OH
35
115
222
μ
A
For pin TEST2
7
Input Pin Capacitance
10
pF
8
Output High Voltage
(Digital Outputs)
2.4
V
9
Output High Current
(Digital Outputs)
I
OH
-6
mA
Source V
OH
=2.4 V, all output and
bidirectional pins except External
SRAM and PLLREF 0 and 1 interface
pins.
10
Output High Current
(Digital Outputs)
I
OH
-4
mA
Source V
OH
=2.4 V, all External SRAM
and PLLREF 0 and 1 interface pins
11
Output Low Voltage
(Digital Outputs)
V
OL
V
SS
0.4
V
12
Output Low Current
(Digital Outputs)
I
OL
6
μ
A
Source V
OL
=0.4 V, all output and
bidirectional pins except External
SRAM and PLLREF 0 and 1 interface
pins.
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