參數(shù)資料
型號(hào): MPC5125YVN400
廠商: Freescale Semiconductor
文件頁(yè)數(shù): 28/94頁(yè)
文件大?。?/td> 0K
描述: IC MCU 32BIT E300 324TEPBGA
標(biāo)準(zhǔn)包裝: 60
系列: MPC51xx
核心處理器: e300
芯體尺寸: 32-位
速度: 400MHz
連通性: CAN,EBI/EMI,以太網(wǎng),I²C,USB OTG
外圍設(shè)備: DMA,WDT
輸入/輸出數(shù): 64
程序存儲(chǔ)器類型: ROMless
RAM 容量: 32K x 8
電壓 - 電源 (Vcc/Vdd): 1.08 V ~ 3.6 V
振蕩器型: 外部
工作溫度: -40°C ~ 125°C
封裝/外殼: 324-BBGA
包裝: 托盤
MPC512
5
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Assig
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ments
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34
HRESET
—ALT0
ALT1
ALT2
ALT3
HRESET
I
VDD_IO
1. This pin is an input or
open-drain output, and have
internal pull-up P-FETs. This
pin can not be configured.
5. This pin contains an
enabled internal
schmitt-trigger.
A17
PORESET
—ALT0
ALT1
ALT2
ALT3
PORESET
I
VDD_IO
1. This pin is an input or
open-drain output, and have
internal pull-up P-FETs. This
pin can not be configured.
2. This pin is an input only.
This pin cannot be configured.
5. This pin contains an
enabled internal
schmitt-trigger.
C17
SRESET
—ALT0
ALT1
ALT2
ALT3
SRESET
I
VDD_IO
1. This pin is an input or
open-drain output, and have
internal pull-up P-FETs. This
pin can not be configured.
5. This pin contains an
enabled internal
schmitt-trigger.
A18
Test/Debug
TEST
ALT0
ALT1
ALT2
ALT3
TEST
I
VDD_IO
2. This pin is an input only.
This pin cannot be configured.
4. This test pin must be tied to
VSS.
D14
Table 2. MPC5125 Pin Multiplexing (continued)
Pin
Pad I/O
Control
Register1
and Offset2
Alternate
Function3
Functions4
Peripheral5
I/O
Direction
Power Domain
Notes
Pin
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