參數(shù)資料
型號: ML9620GAZ210
廠商: OKI ELECTRIC INDUSTRY CO LTD
元件分類: 微控制器/微處理器
英文描述: 1 CHANNEL(S), 1M bps, LOCAL AREA NETWORK CONTROLLER, PQFP44
封裝: 0.80 MM PITCH, PLASTIC, QFP-44
文件頁數(shù): 42/79頁
文件大小: 449K
代理商: ML9620GAZ210
ML9620 User’s Manual
Chapter 3
Operational Description
3 - 7
3.6
Configuration of a Receive Object
Figure 3-3 shows how a Receive Object should be initalised.
MsgVal
ID
Data
Msk
EoB
Dir
NewDat
MsgLst
RxIE TxIE
IntPnd
RmtEn TxRqst
1
appl.
1
0
appl.
0
Figure 3-3 Initalisation of a Receive Object
The Arbitration Registers (ID[28:0] and Xtd bit) are given by the application.
They define the identifier and type
of accepted received messages.
If an 11-bit Identifier (‘Standard Frame’) is used, it is programmed to ID[28:18],
ID[17:0] can then be disregarded.
When a Data Frame with an 11-bit Identifier is received, ID[17:0] will be set
to ‘0’.
If the RxIE bit is set, the IntPnd bit will be set when a received Data Frame is accepted and stored in the Message
Object.
The Data Length Code (DLC[3:0]) is given by the application.
When the Message Handler stores a Data Frame
in the Message Object, it will store the received Data Length Code and eight data bytes.
If the Data Length Code
is less than 8, the remaining bytes of the Message Object will be overwritten by non specified values.
The Mask Registers (Msk[28:0], UMask, MXtd, and MDir bits) may be used (UMask=’1’) to allow groups of
Data Frames with similar identifiers to be accepted.
For details see section 3.3.3.1.
The Dir bit should not be
masked in typical applications.
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