ML9620 User’s Manual
Chapter 3
Operational Description
3 - 3
3.3
Message Handler State Machine
The Message Handler controls the data transfer between the RX/TX Shift Register of the CAN Control, the
Message RAM and the IFm Registers.
The Message Handler FSM controls the following functions:
Data Transfer from IFm Registers to the Message RAM.
Data Transfer from Message RAM to the IFm Registers.
Data Transfer from Shift Register to the Message RAM.
Data Transfer from Message RAM to Shift Register.
Data Transfer from Shift Register to the Acceptance Filtering unit.
Scanning of Message RAM for a matching Message Object.
Handling of TxRqst flags.
Handling of interrupts.
3.3.1 Data Transfer from / to Message RAM
When the MCU initiates a data transfer between the IFm Registers and Message RAM, the Message Handler sets
the Busy bit in the respective Command Register to ‘1’.
After the transfer has completed, the Busy bit is set back
to ‘0’.
The respective Command Mask Register specifies whether a complete Message Object or only parts of it will be
transferred.
Due to the structure of the Message RAM it is not possible to write single bits/bytes of one Message
Object, it is always necessary to write a complete Message Object into the Message RAM.
Therefore the data
transfer from the IFm Registers to the Message RAM requires of a read-modify-write cycle.
First that parts of
the Message Object that are not to be changes are read from the Message RAM and then the complete contents of
the Message Buffer Registers are into the Message Object.
After the partial write of a Message Object, that Message Buffer Registers that are not selected in the Command
Mask Register will set to the actual contents of the selected Message Object.
After the partial read of a Message Object, that Message Buffer Registers that are not selected in the Command
Mask Register will be left unchanged.
3.3.2 Transmission of Messages
If the shift register of the CAN Control cell is ready for loading and if there is no data transfer between the IFm
Registers and Message RAM, the MsgVal bits in the Message Valid Register TxRqst bits in the Transmission
Request Register are evaluated.
The valid Message Object with the highest priority pending transmission request
is loaded into the shift register by the Message Handler and the transmission is started.
The Message Object’s
NewDat bit is reset.
After a successful transmission and if no new data was written to the Message Object (NewDat = ‘0’) since the
start of the transmission, the TxRqst bit will be reset.
If TxIE is set, IntPnd will be set after a successful
transmission.
If the ML9620 has lost the arbitration or if an error occurred during the transmission, the message
will be retransmitted as soon as the CAN bus is free again.
If meanwhile the transmission of a message with
higher priority has been requested, the messages will be transmitted in the order of their priority.