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| 型號： | ML9620GAZ210 |
| 廠商： | OKI ELECTRIC INDUSTRY CO LTD |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 1 CHANNEL(S), 1M bps, LOCAL AREA NETWORK CONTROLLER, PQFP44 |
| 封裝： | 0.80 MM PITCH, PLASTIC, QFP-44 |
| 文件頁數(shù)： | 22/79頁 |
| 文件大?。?/td> | 449K |
| 代理商： | ML9620GAZ210 |
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ML9620 User’s Manual
Chapter 2
Register Descriptions
2 – 12
2.3.2 IFm Busy registers (IFmBUSY : m=1,2)
With this write operation the Busy bit is automatically set to ‘1’ and signal
PRDY/SWAIT is pulled LOW to
notify the MCU that a transfer is in progress.
After a wait time of 3 to 6 fOSC periods, the transfer between the
Interface Register and the Message RAM has completed.
The Busy bit is set back to ‘0’ and
PRDY/SWAIT
is set back to HIGH.
7
6
5
4
3
2
1
0
IFmBUSY
Busy
-*
reset value
0
Address
: CAN Base + 0x11, 0x41
Access
: R
Access Size : 8 bits
Note
‘-’ : Reserved bits return '0' for reads and should be written '0' to them.
Operation is not guaranteed for a
writing '1' to them.
Bit Descriptions
Busy
Busy Flag
0
Reset to ‘0’ when read/write action has finished.
1
Set to ‘1’ when writing to the IFm Command Request Register
2.3.3 IFm Command Mask Registers (IFmCMASK : m=1,2)
The control bits of the IFm Command Mask Register specify the transfer direction and select which of the IFm
Message Buffer Registers are source or target of the data transfer.
7
6
5
4
3
2
1
0
IFmCMASK
WR/RD
Mask
Arb
Control
ClrIntPnd
TxRqst /
NewDat
Data A
Data B
reset value
0
Address
: CAN Base + 0x12, 0x42
Access
: R/W
Access Size : 8 bits
Bit Descriptions
WR / RD
Write / Read
The other bits of IFm Command Mask Register have different functions depending on the transfer
direction.
0
Read :
Transfer data from the selected Message Buffer Registers to the Message
Object addressed by the Command Request Register.
1
Write :
Transfer data from the Message Object addressed by the Command Request
Register into the selected Message Buffer Registers.
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