參數(shù)資料
型號： M7A3PE600-FPQ208I
元件分類： FPGA
英文描述： FPGA, 600000 GATES, PQFP208
封裝： 0.50 MM PITCH, PLASTIC, QFP-208
文件頁數(shù)： 142/168頁
文件大?。?/td> 1335K
代理商： M7A3PE600-FPQ208I
ProASIC3E Flash Family FPGAs
A d v an c ed v0 . 5
3-7
Power Consumption of Various Internal Resources
Table 3-10 Different Components Contributing to the Dynamic Power Consumption in ProASIC3E Devices
Parameter
Definition
Device-Specific Dynamic Contributions
(
W/MHz)
A3PE600
A3PE1500
A3PE3000
PAC1
Clock contribution of a Global Rib
12.77
16.21
19.7
PAC2
Clock contribution of a Global Spine
1.85
3.06
4.16
PAC3
Clock contribution of a VersaTile row
0.88
PAC4
Clock contribution of a VersaTile used as a sequential module
0.12
PAC5
First contribution of a VersaTile used as a sequential module
0.07
PAC6
Second contribution of a VersaTile used as a sequential module
0.29
PAC7
Contribution of a VersaTile used as a combinatorial module
0.29
PAC8
Average contribution of a routing net
0.70
PAC9
Contribution of an I/O input pin (standard dependent)
PAC10
Contribution of an I/O output pin (standard dependent)
PAC11
Average contribution of a RAM block during a read operation
25.00
PAC12
Average contribution of a RAM block during a write operation
30.00
PAC13
First contribution of a PLL
4.00
PAC14
Second contribution of a PLL
2.00
Note: *For a different output load, drive strength, or slew rate, Actel recommends using the Actel
power calculator or SmartPower in Actel Libero IDE software.
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